where can I find the HAL for the peripherals in FPGA when i use the A10 SOC FPGA?

[Rainwang]

hi, 

in previous i used the Nios II in cyclone FPGA and after the SOPC genertated the nios ii eclipse tools will auto generate the HAL for the peripherals in FPGA, i can then use them in my app.

Now i am using the A10 SOC board for booard bring up test with the GHRD, but in the bare metal examples, after i imported the Altera-SoCFPGA-HardwareLib-Timer-A10-GNU into workspace and built it,  i can only find the hwlib which only includes the peripherals in the HPS, 

and i have not find the hardware abstract layer which describes the pheripherals in the FPGA(as showed in below image with red highlighted)

so i have to write the related HAL by myself as below image shows.

My question: can the new workflow for A10 SOC still auto generate the HAL for periperals in FPGA? how to find or use them?

thanks!

[mabdrahi]

Hi,

I will get some info and get back to you soon

Thank you

Aliff

[mabdrahi]

Hi,

I still working on my team.

I will try to make it fast

Thank you.

Aliff

[mabdrahi]

Hi,

Below is the current flow diagram, the info that I have that we need to create our own HAL 

Thank you,

Aliff

[mabdrahi]

Hi,

Below is the current flow diagram, the info that I have that we need to create our own HAL 

https://community.intel.com/t5/image/serverpage/image-id/34986i38876A733C22D3E4/image-size/medium?v=v2&px=400

Thank you,

Aliff

[Rainwang · Accepted solution]

in fact, i just need the instructions as below iamge shows, and i found it on HOWTO Create a Devicetree for Arria 10 SoC | Documentation | RocketBoards.org

thank you for the support!