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Hello,
I am trying to use Intel TSX (RTM) 'xbegin' and 'xend' instruction in the SGX Enclave.
But, whenever I tried, it always goes to 'abort' region.
Does the TSX Instructions no longer available in the SGX Enclave?
If the Micro-code is patched to not allow TSX instructions, is there any way to downgrade the micro-code patch or sth?
Thanks.
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What processor do you have?
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Hello JWChang,
I recommend you read this article, https://software.intel.com/security-software-guidance/api-app/deep-dives/deep-dive-intel-transactional-synchronization-extensions-intel-tsx-asynchronous-abort, which contains info on TSX and SGX.
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It seems that Intel TSX would abort inside the enclave in the hyperthreading-enabled processor. Is this statement correct?
Another question is: will Intel enable TSX inside the enclave in the future?
Thanks a lot!
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It seems that Intel TSX would abort inside the enclave in the hyperthreading-enabled processor due to the TAA vulnerability. Is this statement correct?
Another question is: will Intel enable TSX inside the enclave in the future?
Thanks a lot!
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Hello amy-zhang,
I don't know enough about Intel TSX, TAA, and HT to answer your question. Please try asking your question in the Processors Community.
Regarding your second question, we cannot comment on future roadmaps.
Regards,
Jesus G.
Intel Customer Support
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Intel is no longer monitoring this thread. If you want a response from Intel in a follow-up question, please open a new thread.
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