These are some of the initial hardware enhancement ideas to CPU and Architecture overall:
hardware memory blitter similar to those used in video cards, either integrated or as a co-processor
hardware context switching perhaps 16 banks with, ability to set a thread affinity to a hardware context bank
small internal FPGA fabric
possible uses: implement OS context switching, OS task scheduler in fabric
language aware character functions from internal ROM character sets
long character or binary stream comparison, either integrated or as a co-processor
lots of Rapid Application Development(RAD) applications utilize strings for conditionals
usage example: being able to do a 30 character string comparisons co-processor wise, possible invariant-case comparison
Community, please give your feedback.
Thank you in advance,
Sky Morey
