Bug in MFXVideoVPP_RunFrameVPPAsync()

[celli4]

I reported a bug similar to this a couple years ago, which Intel has since fixed.  link:  https://goo.gl/TiX1db

This new bug is simple (but hard to find):

The hardware libraries can accept any values for the following fields:

    VPPParams.vpp.Out.CropW;
    VPPParams.vpp.Out.CropH;

The software libraries (including the very latest release of MSS 2/10/2016), will fail if those values are not divisible by two without remainder, or put another way, if  (VPPParams.vpp.Out.CropH%2==1), then software transcoding will fail.

The  MFXVideoVPP_RunFrameVPPAsync() call will not fail, but a later dependent MFXVideoCORE_SyncOperation() will fail with either -12 or -16. 

Those error codes are: MFX_ERR_ABORTED, MFX_ERR_UNDEFINED_BEHAVIOR

Here is the easiest way to reproduce this issue:

1.  Start with the tutorial 0.0.3 sample: simple_transcode_opaque_async_vppresize
2. Make the following code change

3. 	//change this code at lines 142-143
   	VPPParams.vpp.Out.CropW = VPPParams.vpp.In.CropW / 4; 
   	VPPParams.vpp.Out.CropH = VPPParams.vpp.In.CropH / 4;
   	// to these lines, this works find in MFX_IMPL_HARDWARE, but fails in MFX_IMPL_SOFTWARE
   	VPPParams.vpp.Out.CropW = 17;
   	VPPParams.vpp.Out.CropH = 17;

4.  Test the new code first in HW mode: simple_transcode_opaque_async_vppresize.exe -hw -b 2000 -f 30/1 \w\bbb480.264 \w\bbb480out.264
5. Test the new code first in SW mode: simple_transcode_opaque_async_vppresize.exe -sw -b 2000 -f 30/1 \w\bbb480.264 \w\bbb480out.264

You will see that the HW engine works fine, but the SW engine fails with the obscure error coming back from Sync operations.

Does this bug also need to be reported via the professional support gateway, or is this a sufficient place to put it to get the ball rolling?

Thanks,

Cameron

[Jeffrey_M_Intel1]

Hi Cameron,

Thanks for your description.  I've got the issue replicated here far enough to start processing.  No need to report via Intel Premier Support.

Regards, Jeff