I/O AT DMA engine documentation?

[GHolt]

I have been all over the website looking for information related to the (vendor/device - 8086/6f50) IO AT DMA driver BAR register usage. I have been unable to find anything useful yet. Where is the DMA driver documented?

[idata]

This request has been difficult to find since it seems that is not publicly available. I will do my best to get this information for you.

I am still searching for this information but if you have the model number of the Intel component I would appreciate the details. Allan.

[idata]

In order to expedite this request, I will need the Intel product model number. I would appreciate if you have that information.

Allan.

[GHolt]

I did find the documentation, at least part of it. I found the first two volumes of the Xeon-D specification documents. I am still not finding the description for the DMA descriptor structure.

[idata]

Please check the following documentation and also check attachment

http://www.intel.com/content/www/us/en/processors/xeon/xeon-technical-resources.html http://www.intel.com/content/www/us/en/processors/xeon/xeon-technical-resources.htmlAllan.

[GHolt]

Yes, I had already found those links, but I have not been able to find the description for the contents pointed to by the CHAINADDR (CBBAROFFSET 90). I know it contains the length, source, destination, next descriptor, but a complete description of the descriptor is what I am looking for. I expected it to be in the volume 2 document, or at the offset, a link to the description or something, but I am still not finding it.

[idata]

I have forwarded this information to the appropriate team. I will update this thread as soon as I get news about this matter.

Allan.

[idata]

I have been trying to get this thread updated and I was able to find some information about DMA Operation on page 67

http://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-1.html http://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-1.html Please confirm if this is the information you have previously requested. Allan.

[idata]

I was wondering if you were able to find the information through the link I posted earlier?

Allan.

[GHolt]

I fail to see how page 67 of Volume 1's documentation tells me how the DMA descriptors format is defined. I expect to see a structure of some sort. Something that shows the transfer size, source and destination addresses.

[idata]

Thanks for the update.

I will forward this information to the appropriate team.Allan.

[idata]

Thank you for your patience.

I have been informed that this information is not available publically. You will need to contact your Intel representative to obtain this information.In order to locate your Intel representative, please contact an Intel Authorize distributor around your area to get a hold of the Intel representativehttp://locate.intel.com/ http://locate.intel.com/Allan.