MEM_TRANS_RETIRED.LOAD_LATENCY_GT and CascadeLake

[GioFari]

I need of these events, but I tried to set the MSR 3F6H with threshold 4 and after the set up of the counter  it continuous to read zero. 

I don't understand if CascadeLake use PEBS for these events or not. What I have to do? Please I need a quickly response.

Table 19-3. of Vol.3

[CarlosAM_INTEL]

Hello, @GioFari:

Thank you for contacting Intel Embedded Community.

We want to address the following questions to understand this situation:

Could you please tell us if the affected units are third-party designs or are developed by you?

Could you please let us know the part number of the processors related to your request? Could you please list the sources that you have used to develop your design?

Could you please give the name of the manufacturer, model, and where is stated the information related to the affected third-party design?

We are waiting for your answer.

Best regards,

@CarlosAM_INTEL.

[GioFari]

Model:85; Model name: Intel(R) Xeon(R) Silver 4208 CPU @ 2.10GHz  CPU family: 6.
I used both perf (at user space) and my kernel module and the counter reads always 0. The other events work well so  the problem is specific for this event. 

[CarlosAM_INTEL]

Hello, @GioFari:

Thanks for your reply.

The  Intel® Xeon® Silver 4208 Processor is a non-embedded device as you may confirm on the following website:

https://ark.intel.com/content/www/us/en/ark/products/193390/intel-xeon-silver-4208-processor-11m-cache-2-10-ghz.html?wapkw=4208%20

We are transferring this forum to the proper support channel.

The team in charge of it will contact you as soon as possible.

Best regards,

@CarlosAM_INTEL.