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Altera_Forum
Honored Contributor I
3,510 Views

Gigabit Ethernet Interface (via Marvell 88E1111) with Cyclone IVE FPGA

Hello Everybody, 

 

I am using Altera DE2-115 Board (CyloneIVE device) and want to connect some other device running in Gbps via its Gigabit Ethernet Transceiver (Marvell 88E1111) interface. 

 

Can I get some idea about how can I proceed for this project? 

 

If some body have already done this project, then please contact me at sceneryofnature@gmail.com

 

_regards 

Sheikh
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37 Replies
Altera_Forum
Honored Contributor I
206 Views

 

--- Quote Start ---  

 

I am using Altera DE2-115 Board (CyloneIVE device) and want to connect some other device running in Gbps via its Gigabit Ethernet Transceiver (Marvell 88E1111) interface. 

 

--- Quote End ---  

 

The comment "running in Gbps" is a bit vague. Are you saying you want to capture an data stream that happens to be operating at Gbps data rate? If so, the answer is probably "No you cannot". 

 

The Marvell PHY is designed for Gigabit data streams. The SGMII interface expects data encoded per whatever GbE encoding uses. It cannot be used to capture an arbitrary Gbps data stream. 

 

 

--- Quote Start ---  

 

Can I get some idea about how can I proceed for this project? 

 

--- Quote End ---  

 

Consider buying a Cyclone IV GX Starter kit and use the Gbps signals on its PCIe edge connector. 

 

If you can describe what you are trying to do in more detail, members of this forum can provide ideas. 

 

Cheers, 

Dave
Altera_Forum
Honored Contributor I
206 Views

 

--- Quote Start ---  

The comment "running in Gbps" is a bit vague. Are you saying you want to capture an data stream that happens to be operating at Gbps data rate? If so, the answer is probably "No you cannot". 

 

The Marvell PHY is designed for Gigabit data streams. The SGMII interface expects data encoded per whatever GbE encoding uses. It cannot be used to capture an arbitrary Gbps data stream. 

 

Consider buying a Cyclone IV GX Starter kit and use the Gbps signals on its PCIe edge connector. 

 

If you can describe what you are trying to do in more detail, members of this forum can provide ideas. 

 

--- Quote End ---  

 

Let me clarify little more: 

At first, I want to interface Ethernet MAC with Cyclone IVE by means of Marvell PHY (MII/RGMII Interface) . The data stream is still not fixed but it will be close to Gigabit.  

 

It seems that Tripple Speed Ethernet MAC could fulfill my task. I am planning to use following Megacore function: 

http://www.altera.com/literature/ug/ug_ethernet.pdf 

 

one more thing, do I need any license to use Megacore function (Tripple Speed Ethernet MAC) with QuartusII Web edition or its free like FIFO? 

 

Is it worthy to proceed in this way or should I use some other alternative if any? 

 

 

 

Regards  

Sheikh
Altera_Forum
Honored Contributor I
206 Views

Yes the core should be good for the job. It does requires an extra license so it isn't free. 

 

Are you using a development kit? If so you should already have an example design with the TSE Mac that you can look at. 

If you are making your own board I would strongly suggest to consider alternatives to the Marvell PHY because Marvell is very annoying with the way they handle datasheets. They require you to sign a restrictive NDA before sending you any documentation.
Altera_Forum
Honored Contributor I
206 Views

 

--- Quote Start ---  

 

Let me clarify little more: 

At first, I want to interface Ethernet MAC with Cyclone IVE by means of Marvell PHY (MII/RGMII Interface) . The data stream is still not fixed but it will be close to Gigabit.  

 

--- Quote End ---  

 

This interface "requirement" is still too vague - "close to Gigabit" is not a definitive statement. 

 

If your protocol is uncertain, then you should really consider interfacing to the Gbps data stream *directly*. The Cyclone IV GX devices are inexpensive, and you will not have to deal with Marvell and its annoying NDAs. 

 

 

--- Quote Start ---  

 

Is it worthy to proceed in this way or should I use some other alternative if any? 

 

--- Quote End ---  

 

Create a simulation of the data stream and capture it using a Cyclone IV GX transceiver channel. 

 

If the Gbps data stream is ~1Gbps, then you can also consider using LVDS on a Stratix series device. 

 

Cheers, 

Dave
Altera_Forum
Honored Contributor I
206 Views

 

--- Quote Start ---  

 

 

Are you using a development kit? If so you should already have an example design with the TSE Mac that you can look at. 

 

--- Quote End ---  

 

 

Yes, I am using Development kit (DE2-115 having Cyclone IVE device) and it has the Marvell PHY (88E1111). I couldn't find an example design with the TSE Mac in the provided CD. Instead I found "10_100_1000 Mbps Tri-mode Ethernet MAC" which also uses Marvell PHY (88E1111) and written in verilog on Opencores.org but I don't know how to use it. can I get some idea how to proceed?
Altera_Forum
Honored Contributor I
206 Views

Yes sorry, I somewhat missed your first post where you said you were using the DE2-115. 

 

It doesn't look like the CD contents are available on Altera's web site (contrary to the non-education development kits) so I can't have a look. But on the board's page (http://www.altera.com/education/univ/materials/boards/de2-115/unv-de2-115-board.html), there seems to be a tutorial in PDF about setting up Altera's TSE: ftp://ftp.altera.com/up/pub/altera_material/12.1/tutorials/de2-115/using_triple_speed_ethernet.pdf (and design files here: ftp://ftp.altera.com/up/pub/altera_material/12.1/tutorials/de2-115/using_triple_speed_ethernet_on_de... ). It's strange they didn't think about putting those on the kit's CD.
Altera_Forum
Honored Contributor I
206 Views

Hi, Thanks this seems to work for my task too. let me try it.

Altera_Forum
Honored Contributor I
206 Views

Hi Daixiwen, 

I am trying to implement the tutorial you provided for TSE_MAC and getting following error while generation using Qsys. 

0 [main] sh 1248 c:\Altera\12.0sp2\quartus\bin\cygwin\bin\sh.exe: ***fatal error- WFSO timed out after longjmp. 

The screen shot is in attchment for better clarification.https://www.alteraforum.com/forum/attachment.php?attachmentid=7614  

 

What is the solution for this error?
Altera_Forum
Honored Contributor I
206 Views

I don't really know... it looks like a cygwin error. I think that cygwin used to have longjmp errors a while ago, but I thought Altera updated to a more recent version of cygwin that corrected the problem.

Altera_Forum
Honored Contributor I
206 Views

Hi, 

I am getting following error while using Altera Monitor Program to apply above tutorial: 

usr\bin\bash nios2-app-generate-makefile: command not found 

 

I looked on some post, they say NIOS IDE should be installed in the directory without space. I already have both nios IDE and Quartus installed in the directory without space. The project directory is also without space. 

 

what could be problem then?
Altera_Forum
Honored Contributor I
206 Views

It could be a problem in your Cygwin installation. Are you doing this from the Nios II command shell? Could you check the value of your PATH environment variable (echo $PATH in the Nios II command shell) and check that you have /cygdrive/*/altera/*/nios2eds/sdk2/bin in it?

Altera_Forum
Honored Contributor I
206 Views

Hi, 

Sorry but I am not much familiar with FPGA environment and actually I didn't understand exactly what you mean. I am applying the software part of that tutorial in Altera Monitor Program software running in windows XP 64 bit and getting that error. 

 

I am not sure this is what you mean but I checked like this from start menu\allprogram\Nios II EDS\Nios2 Command Shell and it shows: 

 

------------------------------------------------ 

Altera Nios2 Command Shell [GCC 4] 

 

 

Version 12.1, Build 177 

------------------------------------------------ 

 

 

Administrator@..../cygdrive/c/altera/12.1 

 

 

when I use here the command: echo $PATH 

the output is: 

 

------------------------------------------------ 

Altera Nios2 Command Shell [GCC 4] 

 

 

Version 12.1, Build 177 

------------------------------------------------ 

 

 

Administrator@.... /cygdrive/c/altera/12.1 

$ echo $path 

 

 

 

 

Administrator@.... /cygdrive/c/altera/12.1 

 

 

and didn't get like: /cygdrive/*/altera/*/nios2eds/sdk2/bin 

 

Altera_Forum
Honored Contributor I
206 Views

It needs to be echo $PATH with capital letters, environment variables are case sensitive. 

 

And what happens if you type nios2-app-generate-makefile in the Nios II command shell? Do you also have the command not found, or something like "SEVERE missing required command line option" ? (if it is the latter, then it means that your cygwin installation is ok)
Altera_Forum
Honored Contributor I
206 Views

Hi Daixiwen, 

 

when I use echo $PATH, it is: 

 

Administrator@.... /cygdrive/c/altera/12.1 

 

Then I changed it into the Path(you mentioned above) by using: 

 

$ export PATH=/cygdrive/c/altera/12.1/nios2eds/sdk2/bin 

 

But after compiling the program in Altera Monitor Program, the error is same as before: usr\bin\bash nios2-app-generate-makefile: command not found 

 

 

I checked the next command you suggested: 

 

$ nios2-app-generate-makefile  

 

and it gives: 

SEVERE: Missing required command line option: "--bsp-dir". 

SEVERE: nios2-app-generate-makefile failed 

 

when I restart my PC, it again set to default as follows: 

 

Administrator@.... /cygdrive/c/altera/12.1 

 

and error is still same. 

 

What could be the solution then?
Altera_Forum
Honored Contributor I
206 Views

It looks like the problem lies in the Altera monitor then, form what I am seeing you can use nios2-app-generate-makefile from the Nios command shell. 

Unfortunately I don't have that monitor so I can run any tests. Can't you generate the application from the Nios Console instead?
Altera_Forum
Honored Contributor I
206 Views

 

--- Quote Start ---  

 

Can't you generate the application from the Nios Console instead? 

--- Quote End ---  

 

 

Hi Daixiwen, 

Is that mean to check the application with "Nios II 12.1 Software Build Tools for Eclipse" software instead of "Altera Monitor Program" software?
Altera_Forum
Honored Contributor I
206 Views

Hi Daixiwen, 

Thank you! I just checked the application with "Nios II 12.1 Software Build Tools for Eclipse" and Its working :)
Altera_Forum
Honored Contributor I
206 Views

Well I didn't help you that much but I'm glad you found a solution ;)

Altera_Forum
Honored Contributor I
206 Views

Hi Daixiwen, 

 

Now, I want to use this tutorial for the real application. 

 

The C Program code which have given to me for this tutorial is in attachment. Which print what the user types in 

the terminal window and send the message through the Ethernet port when the user presses the Enter key. If at any 

time a message is received, the received message will be printed in the terminal window.  

 

I modify it little bit like removing this part from the program: 

// Add new typed characters to the transmit frame until the user types the return character 

while ( (new_char = alt_getchar()) != '\n' ) { 

 

if (new_char == 0x08 && text_length > 0) { // Check if character is a backspace and if there is anything to delete 

 

alt_printf( "%c", new_char ); 

text_length--; 

 

// Maintain the terminal character after the text 

tx_frame[16 + text_length] = '\0'; 

 

} else if (text_length < 45) { // Check if there is still room in the frame for another character 

alt_printf( "%c", new_char ); 

 

// Add the new character to the output text 

tx_frame[16 + text_length] = new_char; 

text_length++; 

 

// Maintain the terminal character after the text 

tx_frame[16 + text_length] = '\0'; 

 

alt_printf( "\nsend> " ); 

text_length = 0; 

 

and now I am able to send via ethernet1 port to the my PC. but speed I am reaching is at 30 Mbps. 

 

I want to increase the speed around 400 Mbps, what Should be the modification? 

Does here changing the length from 62 to lets say 1024 help? 

// Create transmit sgdma descriptor 

alt_avalon_sgdma_construct_mem_to_stream_desc( &tx_descriptor, &tx_descriptor_end, tx_frame, 1024, 0, 1, 1, 0 ); 

 

or is there any other alternative?
Altera_Forum
Honored Contributor I
63 Views

Actually 30Mbps is not bad already. 

Yes, increasing the packet size will improve the bandwidth, as the CPU is spending a lot of time to process each packet, so the more data you can fit in one packet, the better. 

There are several things that can be done to make the system faster. The one with the most impact is to compile your software with optimizations (-O2). I haven't used Eclipse in a while, but it should be somewhere in the project C/C++ settings. Compiling the project in Release mode instead of Debug might be enough to enable the optimizations. But if you already have 30Mbps with so small packets, maybe you are already using optimizations? 

 

Other than that you can use some hardware improvements. If your CPU doesn't have data or instruction caches, enable them. Add to your SOPC/QSYS project a double port packet memory, with one port connected to the DMAs and another to the CPU through a tightly coupled data port. You will also need to change some parameters in the software driver, the procedure is explained in application note 440 (http://www.altera.com/literature/an/an440.pdf). 

There are other optimizations that can be done, but they are much harder. Once I used a software profiler to find which functions were most used, and placed them in a tightly coupled instruction memory. Together with the data optimization, I managed to get a 100MHz Nios II system to send or receive data at about 80-100Mb/s, but I really think it is the maximum you can obtain with this TCP/IP stack. 400Mb/s seems rather unrealistic. You could try to use the LwIP stack instead (I think you'll find some threads about this stack on the forum) or move to a hardware solution, as shown in the offload example on the wiki (http://www.alterawiki.com/wiki/nios_ii_udp_offload_example).
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