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Nios II/e clone

Altera_Forum
Honored Contributor II
1,068 Views

Hello, 

I wrote a Nios II/e CPU clone in verilog. 

It takes between 600 and 800 LEs and executes most of the instructions in 4 cycles. 

It comes with an ISS and a trace tool. Verilog simulation are possible under the free "verilator" tool. 

I am wondering if Altera would allow me to publish this IP. 

What do you think ? 

 

Regards, 

Frederic
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3 Replies
Altera_Forum
Honored Contributor II
151 Views

 

--- Quote Start ---  

Hello, 

I wrote a Nios II/e CPU clone in verilog. 

It takes between 600 and 800 LEs and executes most of the instructions in 4 cycles. 

It comes with an ISS and a trace tool. Verilog simulation are possible under the free "verilator" tool. 

I am wondering if Altera would allow me to publish this IP. 

What do you think ? 

 

Regards, 

Frederic 

--- Quote End ---  

 

 

Just a follow-up : I have created an SOPC builder component for Quartus 9.1sp1. 

If I activate the "Instruction Custom Master" interface under the Component Editor, the custom SOPC component does not show up under SOPC builder. 

Here are the signals declaration in the top level: 

// Nios II Custom Master output ncm_cm_reset, output ncm_cm_clk, output ncm_cm_clk_en, output ncm_cm_start, input ncm_cm_done, output ncm_cm_n, output ncm_cm_dataa, output ncm_cm_datab, output ncm_cm_a, output ncm_cm_b, output ncm_cm_c, output ncm_cm_readra, output ncm_cm_readrb, output ncm_cm_writerc, input ncm_cm_result,  

Is this a known bug of Quartus 9.1 ? It looks like I will be obliged to declare the interface as a "Conduit". 

Best regards, 

Frederic
Altera_Forum
Honored Contributor II
151 Views

Hello, 

I have added a big endian option in the core. 

Is there an easy way to tell GCC to generate big-endian code ? 

Regards, 

Frederic
Altera_Forum
Honored Contributor II
151 Views

Look at the gcc sources, it might need a recompile. 

Howver I'm not sure how well non 32-bit Avalon slaves will work on a BE system. 

You are likely to end up in the 'mess' of ppc - where io accesses to on-chip resources all need byteswapping.
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