Reduce size of hex file to fit into on chip memory

[Altera_Forum]

Hi  

hex file produced by Nios II IDE for my application is more than the onchip memory that I have. I want to reduce the size of that. I am using the blank project in Nios II IDE and adding my .ptf file to it and creating my application. Appreciate your help.  Raj

[Altera_Forum]

Consider reduced driver option in IDE.

[Altera_Forum]

Either your system is large or your onchip memory is less.There is no way to reduce hex file size as it depends on your specific application project and required also for functionality. 

 But you can choose "nios II/e",under nios II process selection,to reduce some LEs.  If this is not worked then go for other memories and integrate in your system (i.e.ssram,sdram etc)

[Altera_Forum]

Compiling with -O2 and getting rid of all the stdio (printf) code is the best bet.

[Altera_Forum]

Hi 

I don't see the change in the file size after following suggestions. I am doing them in Nios II IDE.  Are these to be done in Quartus while implementation or in Nios II IDE?  Raj

[Altera_Forum]

it is needed in your design that program memory must be "onchip memory" only? Because as you said you followed all suggestions and then also u are not able to get rid of your problem. 

 Because if your system is big,though u will try all,you will not able to fit ur sytem into the onchip memory.  so you integrate another memory in your sytem and make them program memory in NIOS IDE.

[Altera_Forum]

Please explain better your problem. 

Do you mean you can't fit your code into the memory or do you simply want the hex file size reduced? The latter would be a false problem. Infact the hex file is meant to be used by Quartus to initialize the memory with your application code upon fpga configuration. The size of this file will be always the same, namely the size of the memory to be initialized. If you reduce the code size you'll simply have more zeros (or 0xFF ?) in the final part of the file.

[Altera_Forum]

We have on-chip memory of 100 KB and the hex file is 241KB. 

Should the hex file be less than the on-chip memory. I am new to Synthesis on FPGA so please guide me on how to use this hex file in the synthesis.  How does "Reduce Code footprint" settings help?  I really appreciate your help. Raj

[Altera_Forum]

Hex files are in a text format: you can read them with any editor like Windows Notepad. Each couple of bytes in the files, encodes one single byte in memory. 

Then, your 240kB hex files describes a maximum of 120kB of memory bytes. But since every line of hex file also contains information about memory address, line length and check sum, I think you'll get exactly 100kb. Go here for detailed information: http://en.wikipedia.org/wiki/intel_hex