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SPI core in nios ii

Altera_Forum
Honored Contributor II
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hi, 

I am using spi core to configure registers of clock chip generator cdce72010. when i read back values from the registers of the chip i get a junk value first, then again when i sent a command to read the value, i get the correct value. why is this ? is it because a junk value is already present in the receive shift register? but if that is the case, i get the junk value when i read reg0, i get reg 0 's value when i read reg1, junk value when i read reg2, i get reg2's value when i read reg3. how could this happen?
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