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About:"Nios II Processor Booting From Altera Serial Flash(EPCQ)"

Yordles_Heart
Beginner
974 Views

Q1:

The 14th page describes how to generate the .jic file. Here is a diagram where the added hex file is specified by a relative address and named epcq_controller.hex. If it is in the Boot Copier Method, does epcq_controller.hex already include the boot copier? Regarding the Execute-In-Place Method, the third page describes a RAM; is it necessary to additionally add this RAM in qsys?
Q2:

The 6th page of the document describes setting the offset address for the Reset Vector, which is illustrated as 0x01E00000 in the example. On the 15th page, it explains the scenario of setting relative addresses in the .hex file. I'm not quite clear on the significance of "You may select Relative addressing if you would like to set a relative address to the reset vector offset (0x01E00000) you configured earlier. For example, setting a start address of 0x01F00000 for the relative addressing mode changes the start address to 0x3D00000."

The input of 0x01F00000 here, what impact does it have, and is it related to the address set in the .sof file? How is 0x01F00000 determined?

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wwanalim_intel
Employee
905 Views

Hi,

 

Greetings and welcome to Intel's forum.

Please give me some time to check on this issue and will get back to you with the update.

 

Thank you.

Regards,

Fathulnaim


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wwanalim_intel
Employee
874 Views

Hi,


May I confirm once again that your question pertains to this document on the link below?


https://www.intel.com/content/www/us/en/docs/programmable/683104/current/nios-ii-processor-application-copied.html


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wwanalim_intel
Employee
844 Views

If it related to that document.


Q1 - Yes. It is essential to include RAM in Qsys since that is where the application is stored.

 

Q2 - It is an optional to use the relative addressing. Usually using the absolute addressing as at the end of the tutorial also using absolute. The address 0x01F00000 will add to the end address of SOF. Using relative addressing will need to compile SOF, generate JIC, check MAP modify the reset vector recompile SOF and regenerate JIC.

 

Below inserted additional information.

Reset vector - https://www.intel.com/content/www/us/en/docs/programmable/726952/23-4/hardware-design-flow-15362.html

Absolute addressing - https://www.intel.com/content/www/us/en/docs/programmable/726952/23-4/programming-files-generation-04026.html


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wwanalim_intel
Employee
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As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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