- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello i want to make my design as fast as possible to run uCLinux, my software is running at 40ms and should run at 8ms.
I am using a linux with MMU, 50mhz clock, 32k Data and instruction Cache, My TCMemory has 1KB. In the make menuconfig i've selected ENABLE MUL INSTRUCTION (is mulx better?) What can i do to get a better performace? Any tips? ThanksLink Copied
- « Previous
-
- 1
- 2
- Next »
21 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
When you inserted the bridge did you address space change (i.e. did your BSP break)? The slave port of the bridge causes everything on the other side of it to be offset in the memory space as seen by the master. So to make sure your address space doesn't change you either place the bridge at offset 0x0 and leave everything else connected to it alone or.... place everything connected to the bridge at some offset starting at 0x0 as seen by the bridge master then shift the bridge slave port upward in the address space so that you end up with the same layout as the bridge-less system had.
That all said, putting extra latency between the CPU and memory for a few MHz increase is not a good idea. In fact leaving the CPU at the same frequency and increasing your memory speed *never* increases your program throughput since the CPU master bandwidth remains the same and you end up adding latency. The only time it makes sense to run the CPU on a slower domain than main memory is if you have big caches and DMAs to do the heavy lifting.
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page
- « Previous
-
- 1
- 2
- Next »