Ask for help on driver code on Altera platform

Altera_Forum · ‎01-14-2011

Hello,

I'm coding on a driver which read data from FIFO, the target is:

Altera Nios II embedded evaluation kit + uClinux

dev-kit：nios2-linux-20090730.tar.bz2

tool-chain：nios2gcc-20080203.tar.bz2

My issue is:

in the loop of for (i = 0; i < fifo_num; i++), if I add printk in

the loop, I can get the data correctly, but if I remove the printk,

then I can only get the first correct byte, the remains are all zero.

Could you please help to figure out this issue? Thank you!

I attach my code here:

static ssize_t  phl_dev_read(struct file *file, char __user *data,
size_t count, loff_t *ppos)
{
       phl_dev_t       *dev;
       ssize_t ret = 0;
       dev = (phl_dev_t*)file->private_data;
       if (dev == NULL) {
               printk(":video_dev is null\n", __FUNCTION__);
               return -ENODEV;
       }
       down(&dev->sem);
       if(atomic_read(&dev->dev_open_flag) == 0) {
               printk("dev%d is close state\n", dev->dev_id);
       } else {
                       unsigned short fifo_num = 0;
                       fifo_num = get_fifo_num();
                       if(fifo_num > 0) {
                               /* copy buffer */
                               int i;
                               volatile __u8   __iomem *src;
                               src = (__u8 __iomem *)(FPGA_BLOCK_ADDR);
                               for (i = 0; i < fifo_num; i++) {
                                       value = *(volatile __u8
__iomem *)(src);
                                       printk("fifo_num=%d,
%d=0x%x.\n", fifo_num, i, value);
                               }
                               copy_to_user((u8*)(data), (u8*)value, fifo_num);
                       }
       }
       up(&dev->sem);
       printk("func:%s line:%d \n", __FUNCTION__, __LINE__);
       return ret;
}

Altera_Forum · ‎01-17-2011

szkaimi, what software you use to debug driver?

Altera_Forum · ‎01-18-2011

Hi, I have fixed this issue with the help from Ian Abbott, thanks Ian and thanks for your concern, I paste his message here:

Make sure you are reading a non-cached address. For nios2-nommu,

non-cached addresses have bit 31 set to 1, and bits 30 to 0 are the same

as the cached address. As a quick test, try replacing FPGA_BLOCK_ADDR

with (FPGA_BLOCK_ADDR | 0x80000000).

For portability, it's better to call ioremap() or ioremap_nocache() in

your device probe() function to convert the physical base address of

your device registers to a pointer to be stored in your private device

structure, and to use readb(), readw(), readl(), writeb(), writew(),

writel() (or ioread8(), etc.). to access these registers instead of

accessing them directly with the '*' operator.

For nios2-nommu, ioremap() merely returns its parameter with bit 31 set

to 1, and readb() etc. just access the I/O memory directly like your

code does.