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Avalon UART not detecting BREAK

Altera_Forum
Honored Contributor II
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I am using both the Avalon UART 7.1 and FIFOed UART 7.1 in a project. My software engineeer can get either core to generate a BREAK condition, but when RXD is held at '0' the brk bit in the status regiuster does not change state. 

 

Any clues or advice anybody? 

 

Has any body had break detection work in Quartus-II 7.2 or later (I have up to 9.1 installed). 

 

John
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Altera_Forum
Honored Contributor II
398 Views

Hi, 

 

yes, it works. We use the BREAK detection and by now it works fine. We had one design compiled with Q8.1 and now on Q10.0.  

Both work. 

 

As we haven't bidirectional UART, we have an extra PIO which switches the the RXD and TXD pin to the right external wire. 

So we cannot transmit and receive simultaneously. 

 

Make sure that your device is in receiving mode when you try to detect the BREAK. 

 

Regards, 

Philipp
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