Building a NiosV BSP using Ashling Riscfree CMake flow fails to compile HAL in Intel code.

[MarkDP]

I am seeing the following error when building the BSP for NiosV. The build failure is in the Altera HAL under HAL/inc/io.h when trying to build the macro for the 32-bit IOWR as follows:

Line 125 writes:

/* Performs swio instruction. BASE and OFFSET are byte-aligned */
#define SWIO(BASE, OFFSET, DATA) do { \
unsigned int __tmpData = (DATA); \
asm volatile ( \
"sw %[DATAReg], 0(%[addrReg])\n\t" \
: \
: [addrReg] "r"(BASE), [imm] "i"(OFFSET), [DATAReg] "r"(__tmpData) \
: "memory" \
); \
} while (0)

But this results in build error:

/Projects/BSP/DGC241/HAL/inc/io.h:126:34: error: expected expression before 'do'
126 | #define SWIO(BASE, OFFSET, DATA) do { \
| ^~

It can be resolved by commenting out the SWIO macro. 

[JingyangTeh_Altera]

Hi

Could you try regenerating the BSP and Cmake List and compile your project?

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

Do you have any update on this case?

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

As we did not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Regards

Jingyang, Teh