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I use a Stratix III Board. I can flash the FPGA design without any problems. But I cant flash the flash memory at the user space with my CPU-Code.
Its very strange. I flashed the user space succesfully while I used an other(similar/older)fpga configuration many times. Then I changed the FPGA design(From 8 CPUs @ Flash & DDR2-Rams) to 8 CPUs with On-Chip-Memory+1 CPU at the flash and Ram. Now I cant flash the program code for the cpu to the user space any more. I work with NIOS2 Command Shell due to I have to trick a bit arround. I add 32MB(2000000hex) to the base address at the .sh-File(I generate this with the flash tool) so the flashwriter knows, that it has enogh memory(thx altera for not fixing that knowen bug :( ). Then I run the script in the console and I got this error: Programm failed at offset 17000000. The base address of my flash memory is at 1000000hex. My reset vector is at 37000000(Tried it before with 35000000). What the hell is going on? Can somebody please help me? :) PS: The attach zip-File consists the .sh flash-file. I allready added the 2000000hex there(instead of 10000000)Link Copied
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I'm pretty confused. I can't get a clear picture of what you're doing from your description. So let's state the facts and you correct me if I'm wrong.
1 - Your CPU reset address is set to 0x37000000. 2 - Your flash memory is based at 0x01000000. (These are the numbers you gave) 3 - You are trying to program your CPU code into the flash starting at address 0x12000000 (completely unrelated to the two addresses you've previously given). 4 - You're telling the elf2flash command that the reset address of the processor is located at 0x13700000 (not related to the two addresses you previously gave). Can you clarify the addresses you gave? Some of them must be incorrect. Jake- Mark as New
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--- Quote Start --- I'm pretty confused. I can't get a clear picture of what you're doing from your description. So let's state the facts and you correct me if I'm wrong. 1 - Your CPU reset address is set to 0x37000000. 2 - Your flash memory is based at 0x01000000. (These are the numbers you gave) --- Quote End --- thats correct --- Quote Start --- 3 - You are trying to program your CPU code into the flash starting at address 0x12000000 (completely unrelated to the two addresses you've previously given). --- Quote End --- I add 2.000.000hex(32MB) because altera considered in their tool chain that the employed 512MBIT flash device actually consists of two 256MBIT flash devices in a single chip package. The GUI tools try to regard it as a 512MBIT device and fail to program it correctly. So if I use the normal base address the programmer tells me, that there ist not enough space. Thats just a trick to work arround that bug. This is working(Worked with other programs/FPGA-Designs). --- Quote Start --- 4 - You're telling the elf2flash command that the reset address of the processor is located at 0x13700000 (not related to the two addresses you previously gave). --- Quote End --- This address ist auto generated and should work pretty good. 10M hex+3,7M hex= 137M hex. --- Quote Start --- Can you clarify the addresses you gave? Some of them must be incorrect. Jake --- Quote End --- I just add 2M hex at the base address to trick arround with a bug. This, as I said, worked in many designs.
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Okay you just gave a piece of key info. The flash is a 512Mbit device and consists of two stacked die.
It seems odd that SoPC Builder would locate the flash at 0x01000000. This means that the flash spans 0x01000000 to 0x04FFFFFF. Can you confirm this? Let's assume the above statement is true. 1 - If your flash is truly located at 0x01000000, and you are trying to program the second die, you should be giving the tools an address of 0x03000000. 2 - Where are the 0x12000000 and 0x37000000 addresses coming from? I don't see how they fit into the picture with the flash device and it's base address of 0x01000000. Jake- Mark as New
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Well it spans form 0x10000000 to 0x13FFFFFF
0x37000000 is the reset vector. The program is coded at the flash address 0x37000000. This is for the SOPC Builder the address 0x1000000. 0x12000000 is the flash address 0x10000000 + 32MB to trick arround with the 2 devices.- Mark as New
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Found the bug!
Got only one CPU which is(should be) connected to the flash and the ram. Got some CPU which are running on on-chip memory. Made a mistake and connected the instruction(or data) bus from a on-chip-mem cpu to the flash. Somehow this wasnt nice for the system. Its working now. PS: SOPC-Builder tool chains are realy bugy.
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