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Altera_Forum
Honored Contributor II
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Hi, 

 

nSTATUS signal: in FPP where the POR time is between 3 to 9ms; do the iMX needs to pulled it low for the time of boot (I mean before configuration starts because the iMX needs 400ms before the reset is de-asserted)? or the FPGA can be left in this stage waiting for the configuration to start by iMX without controlling any config pins during POR of the board and after internal POR of the FPGA?http://www.alteraforum.com/images/smilies/confused.gif  

 

Thanks 

 

MJ:confused:
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