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Cyclone III - Nios II config and init sequence

Altera_Forum
Honored Contributor II
‎01-14-2011 06:45 PM
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The program I have residing in onchip RAM on a CIII containing a Nios II prints to STDIO about 6 seconds after power is turned on. Seems like an eternity to me. I want to know what is normal. If not normal, what could be causing the Nios II and my program to take that long to start. 

 

Is there a document that describes how a CIII initializes the Nios II core and resets the processor? 

 

Or does anybody have insight into the startup sequence of an FPGA containing a Nios II?
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