Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

Dual port shared memory

Altera_Forum
Honored Contributor II
2,383 Views

Hi! 

 

I am working on a project which includes NIOS as the main host processor and it has other parts designed in verilog (a transceiver, a control unit). In the project a dual port memory is to be shared by NIOS and the control unit. I mean both of them can write data to the memory, with NIOS having the higher priority. 

 

I have configured NIOS using SOPC builder, however I am confused about how can I add the dual port memory so that its one end communicates with NIOS and the other end communicates with the control unit designed in verilog. Can somebody help me with this. Thanks
0 Kudos
11 Replies
Altera_Forum
Honored Contributor II
944 Views

Probably the easiest way is to write your own avalon slave interface that accesses the memory within the control unit (which will access it through the other port). 

The alternative is to put an avalon master interface in the control unit vhdl to that it can be linked to an avalon slave using the sopc builder.
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

 

--- Quote Start ---  

 

I have configured NIOS using SOPC builder, however I am confused about how can I add the dual port memory so that its one end communicates with NIOS and the other end communicates with the control unit designed in verilog. Can somebody help me with this. Thanks 

--- Quote End ---  

 

 

Hi, 

 

In SOPC builder, you can add a new component. If you have written your function in verilog, you can connect one side to the avalon bus, as a slave and the other side export to the "outside world". This can be done by defining your signals in the component editor of SOPC builder. 

 

Your SOPC system can then be used in a higher level schematic or HDL. Your exported signals are available for use. 

 

I've attached an example of a fifo. 

 

Good luck, Ton 

 

file:///C:/DOCUME%7E1/GEBRUI%7E1/LOCALS%7E1/Temp/moz-screenshot-2.png
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

Hello, 

 

i am in the same position as waqar03 - have a dual port memory block in logic and logic same as nios should read and write to it. 

 

But i am still new to Quartus and Nios - never did something like building own interfaces to this or creating new components in SOPC builder. Could you give me any tutorials or hints or papers where i can learn this so that i get an interface to this dual port? 

 

:/
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

thanks for your feedback! I am new to NIOS so writing my own avalon slave interface might not be possible for me at the moment. Though, I'm giving it a try for learning purpose 

However, adding new component worked for me. I didn't know that we can set the other part of the code as "export". 

Thanks for the valuable information
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

 

--- Quote Start ---  

Could you give me any tutorials or hints or papers where i can learn this so that i get an interface to this dual port? 

 

:/ 

--- Quote End ---  

 

 

Just go to the Altera website and search for "SOPC builder" and "Avalon MM" and you can spend the rest of the year reading. 

 

Start with: 

http://www.altera.com/literature/manual/mnl_avalon_spec.pdf 

http://www.altera.com/literature/lit-sop.jsp 

 

Good luck, Ton
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

OK, that will take a while ^^ 

 

Thx.
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

 

--- Quote Start ---  

Hi, 

 

In SOPC builder, you can add a new component. If you have written your function in verilog, you can connect one side to the avalon bus, as a slave and the other side export to the "outside world". This can be done by defining your signals in the component editor of SOPC builder. 

 

Your SOPC system can then be used in a higher level schematic or HDL. Your exported signals are available for use. 

 

I've attached an example of a fifo. 

 

Good luck, Ton  

--- Quote End ---  

I have tried to import my design file to SOPC builder, the snapshot is attached, I'd appreciate if you can have a look and tell me if there are any errors. 

Secondly, how can I access this custom built design while programming. The imported design in this case is a memory, which has to be written to through a DMA. Can you please give me some example, (a macro may be) about how to write to this memory. 

Thanks
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

 

--- Quote Start ---  

I have tried to import my design file to SOPC builder, the snapshot is attached, I'd appreciate if you can have a look and tell me if there are any errors. 

Secondly, how can I access this custom built design while programming. The imported design in this case is a memory, which has to be written to through a DMA. Can you please give me some example, (a macro may be) about how to write to this memory. 

Thanks 

--- Quote End ---  

 

 

The error is about the clock assosiation. In the interface tab, just select the clock associated with the avalon_0 interface. See the snapshot. 

I can't help you with the programming. I'm a hardware designer and let others do the programming :) 

 

Success, Ton
0 Kudos
Altera_Forum
Honored Contributor II
944 Views

thanks... it really helped.. I wonder why I make such silly mistakes :P

0 Kudos
Altera_Forum
Honored Contributor II
944 Views

Don't worry. We all make silly mistakes. Take my word on that.

0 Kudos
Altera_Forum
Honored Contributor II
944 Views

Hi Guys, 

 

What you've got up there has really helped me. But i have one question? 

 

How do you then control this FIFO in Nios? As in, i've made one of these, what c-code do you youse to trigger a read and and accept the data?
0 Kudos
Reply