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Hello Folks,
I am using quartus prime 15.1 and Qsys to create nios ii soft processor to run on altera max10 FPGA.
I created "hello world" software using nios ii SBT for eclipse to run on nios ii.
I downloaded the processor from quartus on the FPGA board correctly, then when I tried to download the "hello world" to the nios ii on the board , I get the following error:
"Launching <project name> nios ii hardware configuration has encountered a problem - Downloading ELF Process failed"
I am encountering this issue for all my projects and designs , they wont run on the board..
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I finally figured out how to solve this.
It is mainly due to any mistake during the nios ii design, especially connections related to the memory where the ELF file will reside.
In my case, the ELF was to be uploaded in onchip memory, which was connected to the reset from the nios ii core , but that reset from the core was not connected to any input signal. Once I connect it ti (1) or VCC the debugging was completed sucesfuly.
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I finally figured out how to solve this.
It is mainly due to any mistake during the nios ii design, especially connections related to the memory where the ELF file will reside.
In my case, the ELF was to be uploaded in onchip memory, which was connected to the reset from the nios ii core , but that reset from the core was not connected to any input signal. Once I connect it ti (1) or VCC the debugging was completed sucesfuly.
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Hi,
I am also facing the same issue but couldn't understand what you are saying can you please elaborate your solution.
Thanks
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Hi ABin01,
Thanks for sharing your solution. I'm going to close this case if you do not have more info or question for us.
Best regards.
Isaac Vazquez.
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