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Hello,
1) Is the GHRD ghrd_5astfd5k3 compatible with the ArriaV SoC Development Board? 2) According to the GHRD ghrd_5astfd5k3, some of GPIOs are selected instead of the EMAC1 ports in the HPS Peripheral Mux (e.g. GPIO17 instead of EMAC1.TXD2, GPIO18 instead of EMAC1.TXD2, etc - please see below the shortcut). So, how the EMAC1 can work if some of its ports are disabled (GPIOs are used instead of them)? http://www.alteraforum.com/forum/attachment.php?attachmentid=11601&stc=1 Thank you!Link Copied
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Looks like this 5astfd5k3 that you openned is 14.0 GHRD for Arria V already..
You are right, this looks not going tp work..how ever i think most of the emac design example are in cyclone v which is already enabled those pins for utilization, i open up for cyclone one all with emac pin selection. did you tried open some of the design example say for cyclone V?- Mark as New
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No, I just tried this GHRD, which was recommended by the local FAE...
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maybe consider to download a cyclone V one and open it for verification.
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OK, thanks, will do it... Anyway, it will be very strange if GHRD contains any errors... I believe thunders of user look into this GHRD...
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I would say the hps emac this is not implemented for in Arria V probably as so far most design example is in cyclone V. :D
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Could you probable let me know a web link to the CycloneV EMAC design example? Thank you
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http://rocketboards.org/foswiki/view/projects/cyclonevsgmiiexampledesign
This is one of the emac with cyclone. Maybe suitable for your reference? Sorry no bare metal version.- Mark as New
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Thanks! Got it :-)
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By the way any guys/visitor around may share of there is possible design example that is using Arria V as the base?
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