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12748 Discussions

Help! Error occurs when I use PLL in NiosII

Altera_Forum
Honored Contributor II
‎07-15-2006 01:46 PM
1,104 Views

The error as follow: 

 

Error: Clock input port inclk[0] of PLL "niosII:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|pll" must be driven by a non-inverted input clock pin 

 

But I didn't invert the clock before the PLL input clock pin. 

How can I slove the problem? Will anyone help me? 

Thanks in advance!
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Altera_Forum
Honored Contributor II
‎07-15-2006 06:14 PM
365 Views

I believe you have to use a dedicated input clock pin to drive a PLL. The message isn't referring to what you've done, internally (logic-wise), but that you're trying to drive a PLL with an incorrect incoming pin. 

 

- slacker
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