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How can Nios II/f get shorter delay than the delay of add operators?

Altera_Forum
Honored Contributor II
‎10-07-2010 07:02 PM
1,024 Views

I compiled Nios II/f for Startix II and achieved 5.738 ns delay. 

But delay of 32-bit adder was 6.544 ns under tight timing constraint(4 ns). 

On Nios II/f, add instruction take just one cycle. 

How is it possible??
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