How to convert ahdl into vhdl(or verilog)?

[Altera_Forum]

I want to create a new component.But I desiged the block using ahdl.In spoc builder ,must I use vhdl or verilog to develop my project? How to convert ahdl into vhdl(or verilog)? 

Thanks!

[Altera_Forum]

How about creating a VHDL or Verilog wrapper that instantiates your AHDL subdesign once? The module that SOPC Builder sees must be VHDL or Verilog, but I think that the files below it can be anything that Quartus II reads.

[Altera_Forum]

Your other option is to keep your AHDL logic external to SOPC builder and use component editor to export the signals you need then connect it at the top level (if you like a clean top level then I would use a wrapper like Kerry suggested).

[Altera_Forum]

I convert AHDL to VHDL by Xilinx's software ise ->HDL convertor 

But I will try to your suggestions.Thanks!