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I have a Qsys design with NIOS2 C program. The program will read the Altera ADC component of the Qsys system (Max10 on-chip ADC) as each data point becomes ready. The simplest scenario. No 'sample train' or sequencer required. Just check for new ADC value and read the value in the data register. I have the ADC configured in Qsys for dedicated input on ANIN, channel 0.
Based on my understanding of a similar enquiry here in another thread, http://www.alteraforum.com/forum/showthread.php?t=57979 I am wondering if ADC read is as simple as 'knowing the ADC data register address to read from, and reading it using a pointer'. The pages I am reading look to suggest that, to read a Qsys IP register address, we can simply do the following: For example, let's say my ADC value register in Qsys is at mem location 0x5000. step 1: initialize a pointer to the data address of ADC register as - " int *adc_data = 0x5000; " step 2: Read data using - " ADC_value = adc_data[0]; " When I 'build' this is get a caution that "initialization makes pointer from integer without a cast [-Wint-conversion]". I'm not sure how to interpret the message, or my mistake, but it looks like I don't have it right yet. I'm hoping someone can help me understand the message in context, and provide a simple example if possible. Thanks,Link Copied
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UPDATE: On simplest reading of ADC value, when data is ready
I was able to sort it out. It was indeed very simple in final analysis, but took days to sort as there seems to be few references on basic ADC read without sequencer and other ADC parameter controls. Here's is what i came up with, in case it will help the next person: # include "altera_modular_adc.h" int main() { ALTERA_MODULAR_ADC_SAMPLE_STORAGE_IRQ_ENABLE(MODULAR_ADC_0_SAMPLE_STORE_CSR_BASE); adc_set_mode_run_continuously(MODULAR_ADC_0_SEQUENCER_CSR_BASE); adc_start(MODULAR_ADC_0_SEQUENCER_CSR_BASE); Int AD_value; while (1){ // check IRQ status and repeat until data ready while((READ_ALTERA_MODULAR_ADC_SAMPLE_STORAGE_IRQ_STATUS(MODULAR_ADC_0_SAMPLE_STORE_CSR_BASE))==0); // read data AD_value = IORD(MODULAR_ADC_0_SAMPLE_STORE_CSR_BASE, 0); // reset IRQ data status bit flag for next sample CLEAR_ALTERA_MODULAR_ADC_SAMPLE_STORAGE_IRQ_STATUS(MODULAR_ADC_0_SAMPLE_STORE_CSR_BASE) } return 0; } Perhaps someone with more experience can confirm this basic solution is OK as is when no sequencer and other ADC control is needed, but data values and sample rate are as expected. Cheers, Bob![](/skins/images/45C6C2D737ED71F4C51F0145C8CB1E9C/responsive_peak/images/icon_anonymous_message.png)
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