Linker : Restrict section sizes

[Altera_Forum]

Hi 

 I have a project in which some units have a bigger SRAM. To accomodate this, I've modified the SOPC design by increasing the number of address bits on the SRAM component.  However, in order to compile programs to run on boards with the smaller SRAM, I would like to be able to set something in the linker (or hack the .PTF) to restrict the section sizes, so that I can avoid having to constantly modify and rebuild the SOPC design.  Is there an easy way for me to do this? I'm using Quartus/NIOS-IDE 7.2.

[Altera_Forum]

Would swapping the (MPU).sopc and (MPU).ptf files in and out, and performing a make-clean, work?

[Altera_Forum]

Now that I've built them, it looks as though it's possible to change 1 line in the SREC file (corresponding to the initialisation of the stack pointer) to allow for smaller SRAM.

[Altera_Forum]

Or put the stack somewhere else - so that it isn't in high memory ...