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Loading of code to SRAM

Altera_Forum
Honored Contributor II
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Hello all, 

 

In the system library properties I can ask for my code to run from the SRAM. I'm interested in knowing what happens behind the scenes when I compile and Run / Debug my code using the Nios IDE. 

 

Is some loader created, prepended to my code and copies it into SRAM, jumping to it for execution ? What is going on exactly ? Can I see this loader / is this some assembly program ? 

 

The same goes for a "production board" where the Stratix is loaded from the EPCS device. How is the code copied to SRAM ? Should I write a boot loader for that, or are there custom loaders available for this purpose ? 

 

Thanks in advance
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Altera_Forum
Honored Contributor II
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I remember that altera give a file to describle boot from flash. 

We can select auto boot from flash to sram.
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Altera_Forum
Honored Contributor II
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Yes, what you describe is what happens. The build process adds a boot loader that's responsible for copying the segments to the correct memory locations and then jumping to that location. There's a boot loader specifically for the EPCS. 

 

You can look at the code of the bootloader(s) in your components directory, on my machine in c:\altera\kits\nios2_51\components\altera_nios2\sdk\src\boot_loader_sources) 

 

Andrew
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Altera_Forum
Honored Contributor II
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originally posted by queisser@Mar 15 2006, 02:31 PM 

yes, what you describe is what happens. the build process adds a boot loader that's responsible for copying the segments to the correct memory locations and then jumping to that location. there's a boot loader specifically for the epcs. 

 

you can look at the code of the bootloader(s) in your components directory, on my machine in c:\altera\kits\nios2_51\components\altera_nios2\sdk\src\boot_loader_sources) 

 

andrew 

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Thank you, I will look at that.
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Altera_Forum
Honored Contributor II
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For run/debug in the IDE (not flash bootload, as previously discused), the nios2-download app is called from the IDE. nios2-download communicates to the Nios debug core (thus necessitating the presense of one in your design) via your JTAG download cable. On the Nios side of things, the processor receives a special break signal that casues it to execute code from a small monitor inside the debug core. This monitor accepts commands from your PC (nios2-download) to read/write/verify memory as required to download and debug your application.

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