Loading soc_system Peripheral Register descriptions into DS-5 ?

[Altera_Forum]

Hi, 

I have just before Christmas purchased a DE0-Nano-SoC, which seems very versatile and I would like to look at and debug the custom peripheral registers using DS-5 Community Edition 27.1  I am starting from example code  DE0-Nano-SoC_v.1.1.0_HWrevB0_revC0_SystemCD\Demonstrations\SoC_FPGA\my_first_hps-fpga  (and have created a version with 3 PIOs plus my own firmware I developed on a Cyclone II FPGA) I am currently just trying to look at the registers in "my_first_hps-fpga", and viewing the videos with the DE0-NaNO-SoC (repeatedly) I am beginning to understand DS-5 ... but .....  i have a problem with viewing the peripheral registers,  in that in the videos it suggests in Debug Configuration => Files that I need to supply a DIRECTORY where the soc_system register description can be found. However the DS-5 Community Edition 27.1 code is asking for a FILE.  http://www.alterawiki.com/wiki/socedsgettingstarted#view_core.2c_system_and_fpga_peripheral_registers suggests I should find it in "synthesis", but I have tried all the files there and typically get the following error messages :   add-symbol-file"D:\home\jbww\Design\Altera\Quartus_Designs_Cyclone_V_DE0_Nano_SoC\Example_01_SoC+FPGA_LEDs\soc_system\synthesis\soc_system.qip" ERROR(CMD685-COR107): ! Failed to loadsymbols for "soc_system.qip" ! Unable to detectimage type of file"D:\home\jbww\Design\Altera\Quartus_Designs_Cyclone_V_DE0_Nano_SoC\Example_01_SoC+FPGA_LEDs\soc_system\synthesis\soc_system.qip"  so my question is, what file / file suffix am i looking for ?  cheers, Dr. Beau Webber  

[Altera_Forum]

There are two white rectangular boxes under Debug Configuration->Files for adding the following information. 

In the first box, you specify the "Application on host to download". This is the baremetal binary file that was compiled from C.  In the second box just below it, you can specify either the "Add peripheral description files from directory", or you  can specify the "Load symbols from file". There should be a pull-down selector to specify the first directory,  or the second file. Select the "Add peripheral description..." and point it to the soc_system/synthesis directory.  BTW, I thought the Community Edition of DS-5 did not support baremetal debugging on the hardware/board platform.  At least, I have not seen that option available in my version of the Community Edition.

[Altera_Forum]

Hi Austin, 

Yes thanks for that. Well my supplied examples and videos do seem to include quite a bit on baremetal. However my application is a simple single-threaded Linux C application, talking to PIOs. What I am seeing for the Debug Configuration files tab is :  https://www.alteraforum.com/forum/attachment.php?attachmentid=14637   As I say, it complains about any of the files in synthesis. cheers, Beau

[Altera_Forum]

Where it says "Load symbols from file", select that, and see if you can change it to -- "Add peripheral description files from directory" 

and guide it towards the soc_system/synthesis directory. Don't select any of the files, just the directory.  What do you have selected under "Connections"? Is it "Cyclone V SoC (Dual Core)", "Linux Application Debug", or something else? Have you gotten the 30 day evaluation license?  I don't have an option for Baremetal debug, and when I select the Linux Application Debug, the option to add the peripheral description files disappears.

[Altera_Forum]

The "Load symbols from file" is a drop down selector, and that is the only option anything to do with symbols. 

 This is I think a version of DS-5 particularly tuned to the DE0-Nano-SoC , the only connection option is "DE0-Nano-SoC" (via Ethernet).  This is what I see in the Registers display, not even the default DE0-Nano-SoC peripherals, so something is not right, even though I have the files that describe them, I can not pass these to DS-5 :  https://www.alteraforum.com/forum/attachment.php?attachmentid=14640

[Altera_Forum]

Please see the Soc EDS guide, section 6.3.3.2, Figure 31: 

 https://www.altera.com/en_us/pdfs/literature/ug/ug_soc_eds.pdf  You want to see this option from the manual: "Add peripheral description files from directory – the debugger to load peripheral register descriptions from the .SVD files stored in that directory. The SVD file is a result of the compilation of the hardware project."  I am not sure why you can't see that option, but I suspect it has something to do with the lack of a license for the full DS-5 edition. Look at section 6.3.3.1 of the manual and there are many different Connection options.  I only see two Connection options in DS-5 since I have the Community Edition.  The Files options change depending on the Connection options. For example, I can see the Files option "Add peripheral description files from directory" if I select the Connection option of "ARM FVP (Installed with DS-5)", but the peripheral description option is not present if I  select the Connection option of "Linux Application Debug".  What do you see under: Window->Preferences->DS-5->Configuration Database  What do you see under the directory listed there? It may look something like this:  $ pwd /home/dshol/intelFPGA/ds-5/sw/debugger/configdb $ ls Boards Components Cores Docs Flash Gdbserver Include OS Schemas Scripts SoCs $ ls Boards 96 Boards beagleboard.org FDI LOGIC_PD Raspberry Pi Foundation Actions Semiconductor boards.xml Fujitsu Marvell RC Module Alpha Project Boundary Devices Generic mbed Renesas Altera Calao_Systems HardKernel Mindspeed Samsung Applied Micro Cavium Icytecture Mistral Silica_Phytec ARM Development Boards core_contents.xml Intel Nufront Spansion ARM FVP Core_Logic Intel SoC FPGA nVIDIA Spectrum_Digital ARM FVP (Installed with DS-5) CSR Keil NXP ST ARM SubSystem FVP Embedded_Artists Kyoto Origenboard.org ST-Ericsson Atmel Emtrion LG_Electronics pandaboard.org Texas_Instruments Avnet Faraday Linux Application Debug Phytec Xilinx

[Altera_Forum]

Thanks, 

OK, what I see for my options is :  https://www.alteraforum.com/forum/attachment.php?attachmentid=14643   I do find a .svd file : add-symbol-file "D:\home\jbww\Design\Altera\Quartus_Designs_Cyclone_V_DE0_Nano_SoC\Test_11_SoC+FPGA_timed_LEDs_Skel_Counter\soc_system\synthesis\soc_system_hps_0_hps.svd" ERROR(CMD685-COR107):  ! Failed to load symbols for "soc_system_hps_0_hps.svd" ! Unable to detect image type of file "D:\home\jbww\Design\Altera\Quartus_Designs_Cyclone_V_DE0_Nano_SoC\Test_11_SoC+FPGA_timed_LEDs_Skel_Counter\soc_system\synthesis\soc_system_hps_0_hps.svd"  With "Other file" option, the above .svd is loaded without complaint, but there is no change to the register list.  add-symbol-file "D:\home\jbww\Design\Altera\Quartus_Designs_Cyclone_V_DE0_Nano_SoC\Test_11_SoC+FPGA_timed_LEDs_Skel_Counter\hps-c\Test_11_SoC+FPGA_timed_LEDs_Skel_Counter" ERROR(ITR575): Symbols for image D:\home\jbww\Design\Altera\Quartus_Designs_Cyclone_V_DE0_Nano_SoC\Test_11_SoC+FPGA_timed_LEDs_Skel_Counter\hps-c\Test_11_SoC+FPGA_timed_LEDs_Skel_Counter are already loaded at offset 0x00000000 If the tick option under the binary file is unticked, above error message goes, no change to the register set.   Re the configuration database, I seem to see about the same list as you do, however the only active one seems to be the DE-Nano-SoC one.

[Altera_Forum]

I did reply to your posting, but it seems to have been lost. 

Anyway, the (unfortunate) answer to this problem has been given to me on the DS-5 Forum, by Lukas Snetler :  Hi Beau,  One of the options that the Community edition supports is Linux user space application debug through an ethernet connection. I suspect that this is the debug configuration that you have chosen, but let me know if I'm mistaking. For that type of connection the peripheral files option is not supported.  Adding peripheral files is however supported through a JTAG or USB Blaster connections to your target. Unfortunately that functionality is not enabled in the Community Edition of DS-5. It is however enabled in the DS-5 Professional and Ultimate editions, as well as the Intel SoC FPGA edition. See developer.arm.com/.../intel-soc-fpga.  Assuming you have not had a previous evaluation license, then you can get 30 day evaluation license from the aforementioned link which will allow you to follow the steps in the tutorial you referenced.  Regards,  Lukas.  Lukas is indeed quite right, I am indeed accessing the DE0-Nano-SoC via the Ethernet connection, which is very convenient. I will evaluate various ways forward. Thanks for your help Austin.