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Memory Map with large external RAM

New Contributor I


I'm trying to find a valid memory map for a NiosII system with MMU, 2 GB of external RAM and a small bootloader in flash.

As far as I can see, the only physical addresses where I can place the RAM are 0 and 0x80000000, and 0 is the only real choice as kernel memory, where the interrupt and TLB miss vectors should be, must be below 0x20000000.

The reset vector, however, should point to flash, and the debug vector needs to point to the debug memory.

I can see two obvious solutions:

  1. Add a multiplexer that redirects reads from low addresses to the flash controller, and start the bootloader code with a routine that copies everything to RAM, then switches the multiplexer
  2. Add a reset controller that initializes RAM from flash before allowing the CPU to start

Both look like they will need quite a bit of work, so I'm wondering if there is an easier solution I'm missing here.


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1 Reply

Hi @SimonRichter,


Thank you for posting in Intel community forum, hope this message find you well and apologies for the delayed in response.
Please do let us know if you are still facing the difficulties mention and we would get back to you as soon as possible.


Best Wishes

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