Missing Memory

Altera_Forum · ‎04-27-2005

Hi:

I've got a Cyclone with NIOS II Quartus 4.1

Attached are 2 SDRAM chips that work great. I nca load the FPGA and then with the IDE load code and step through it.

RS232, TImer, PIOs interrupts all up and running.

I've then installed a tristate bus with FLASH devices and MISC inuts and outputs with 245 and 573 type gates and latches (All 8 bit).

I can't see anything external to the FPGA on this tristate bus.

I've shared address and data for that tristate bus. But kept Chip Selects, Read, Write and output enables seperate.

What did I forget???

George

Altera_Forum · ‎05-01-2005

wild guess from that little info:

Have you connected the bus in SOPC to the processor?

Altera_Forum · ‎05-02-2005

No and that's the problem.

But I see no way to do this. There is no button available to click.

I've got an SDRAM connected to the CPU.

I've got a DMA connected to the CPU

The common flash interface devices cannot connect ot the CPU.

Any Altera folks know the answer???

thanks

george

Altera_Forum · ‎05-02-2005

The CFI flash device needs to be connected to the CPU through an Avalon Tri-State Bridge.

Add an Avalon Tri-State Bridge to your system, connect the avalon_slave port to the cpu and connect the tristate_master port to your flash.

-edit-

On a second look it seems like you may be doing this. If so, you can ignore me http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif

Dennis Scott

Microtronix Datacom

Altera_Forum · ‎05-02-2005

Hi gmm50,

i think u need a tristate bridge component, available in SOPC builder under bridges components. It has a master and a slave port: connect the slave to the CPU buses and the master to the slave port of your CFI device.

....sorry i didn't see the previous answer http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif

Altera_Forum · ‎05-02-2005

The weekend must have refreshed every one!! Thanks for the great replys.

I realized I needed that tristate bus and already had it included but............

I looked at the modules (CFI and Interface to user logic) that I had no option to connect to the bus and couldn't see any problems. SOmetimes if you don't have read and write control I've been told that the compiler might not make a connection.

I next deleted my DMA controller and the little black dots connect the offending devices to the tristate bridge.

This is good and will fix my original (missing memory) problem. I am using Quartus 4.1 and perhaps 4.2 would have avoided this situation.

But I will need that DMA controller in the final design.

THanks

George

Altera_Forum · ‎05-02-2005

You should have no problem of coexistance of your dma and your tri-state bridge! At least not from SOPC's point of view. You may run into fitting or timing problems later, but thats a completely different story.

Hoover your cursor on the dots/rings and click them on and off. Thats all you need to setup the bus connections.

Altera_Forum · ‎05-02-2005

Well after a day of clicking no joy.

Perhaps it's another problem in the control area.

I'm sharing the address and data bus but using seperate read, write and chip select.

Am I getting into trouble not sharing read and writes??

george