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Modelsim simulation not work :(

Altera_Forum
Honored Contributor II
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Hi everyone  

 

I try to start using nios2 5.1 - i use 1.0sp1 before 

 

I have a problem with simulation in Modelsim 6.0  

 

my step's is next below : 

1. open - 100% worked project based on nios2 1.0 sp1  

2. add Jtag debug level 1 to processor and regenerate system in SOPC 5.1  

3. import old 100% working software IDE design and successful recompile it.  

4. select Modelsim only, no hardware support in system library  

here is snapshot http://slil.ru/22672193/1967767657/work_space1.jpg (http://slil.ru/22672193/1967767657/work_space1.jpg

5. successful recompile C code  

6. in IDE select RUN->RUN AS->NiosII Modelsim 

7. in Modelsim select Tools ->execute macro - and select setup_sim.do  

8. After this i press s in console to recompile design  

9. press w to get timing diagramm  

10. write in console run 500 us  

 

and got this in my screen 

here is picture of my diagram  

http://slil.ru/22672170/1967767657/work_space.jpg (http://slil.ru/22672170/1967767657/work_space.jpg

To many strange errors and simulation always stops. 

How to fix this ? 

 

What i miss ? 

This way was work in previous version without any problem.
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Altera_Forum
Honored Contributor II
453 Views

Just a guess, but there seems to be some undefined input signal, that corrupts the other signals. When changing to the new version, maybe some pins/addresses/whatever changed and there is an unconnected input or something?

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Altera_Forum
Honored Contributor II
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No i think i't more complicate and deep problem with NIOS51 !  

 

Because in NIOS2 1.01 sp1 it work and just after compiling in NIOS51 the same thing is not work  

I was try in development kit 1C20 - the same - is not possible to simulate runing of nios2 in modelsim !!!!!!!!!!!!!!!!!!!!!!!! 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif  

Now i must revert to my working nios2 1.0 sp !!!!!!
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Altera_Forum
Honored Contributor II
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Hello experts http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif  

i want to bring this topic up again !  

 

How simulate NIOS2 5.1 in modelsim ?  

this feature is not work !!!!
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Altera_Forum
Honored Contributor II
453 Views

 

--- Quote Start ---  

originally posted by alexs@Apr 16 2006, 10:47 PM 

hello experts http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/smile.gif  

i want to bring this topic up again !  

 

how simulate nios2 5.1 in modelsim ?  

this feature is not work !!!! 

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=14420) 

--- quote end ---  

 

--- Quote End ---  

 

 

Hi AlexS, 

 

I took a look at your diagram and it seems that the d_irq signal that feeds into the Nios II CPU looks to have a Z input right after the reset signal is released (0000000Z&#39;b). I would expect simulation to "fail" when an undefined input is driven into logic. 

 

Everything on the Nios II processor goes to high-impedence (red) after that Z input to the d_irq from the system inputs. I would consider looking at all your components that use irq to the Nios II processor to trace back their source.  

 

One idea may be to remove each component from the system to see if the problem goes away. 

 

Regards, 

-ATJ
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