NIOS-II with multiple on-chip memory

[Altera_Forum]

I have a nios-II processor with 1 on-chip memory for cache/instructions/data and 2 other on-chip memory as a memory interface between the nios and some custom vhdl code I have written. Is it possible to ensure that the nios does not use these 2 additional memory blocks for data/instructions? I fear that my data may be overwritten by the processor during execution. Thanks!

[Altera_Forum]

In your software project you can configure which memory is used by the .text (instructions) .data (static defined data) .bss (static undefined data) sections, and which memory is used for stack and heap (allocated memory space). As long as you don't use those two memory blocks for any of those sections, the contents won't be overwritten by the CPU. 

Don't forget to check in the Nios CPU configuration is SOPC builder that you don't use those components for the CPU reset vector or exceptions either.