NIOS boot loading

[Altera_Forum]

Hello, 

I am new with NIOS architecture. One part of my project deals with NIOS, I don't have to understand what's going on inside, but it has to be loaded so that my project can work fully. I have a NIOS IDE project files with a boot.c, NIOS_BOOT_LOADER.elf etc... Does any one know a documention, or could explain me how can I make this boot.c running inside the NIOS when the FPGA starts? I have already generated my NIOS core.  Thanks

[Altera_Forum]

What flash memory do you have on your board?

[Altera_Forum]

Thanks for your answer. 

I have a flash memory on my board, numonix with spi bus interface. You think I should use that flash memory?

[Altera_Forum]

Are you using it to configure the FPGA with the AS method? In that case you can flash your software in it just after the configuration, and use the bootloader embedded in the EPCS controller to recopy your software in main RAM and run it. 

The bootloader is briefly described at the beginning of application note 458 (http://www.altera.com/literature/an/an458.pdf?gsa_pos=3&wt.oss_r=1&wt.oss=nios%20boot%20loader&gsa_pos=10&wt.oss_r=1&wt.oss=epcs%20bootloader).

[Altera_Forum]

Hi, 

In my case, NIOS software is sent by FPGA code to NIOS who sends it to SRAM. I need the boot.c to be running in the NIOS core when it is started. I don't know how to make that.  When I open SOPC for the .ptf assiciated with my project, I see a ram_bootloader and a onchip_memory_0 module name ( on-chip memory component). In its option I see that it is possible to specify an .hex file with them. Is there a way to generate an hex file from my boot.c and to put it inside? does it have any sense?  Regards,

[Altera_Forum]

In SOPC builder, check that the ram_bootloader memory is connected to the Nios' instruction master port, and that the CPU's reset vector is set to the ram_bootloader. 

Then in your boot.c file, add an attribute to every function and static variables so that they end up in the bootloader RAM. Something like: void myfunc(parameters) __attribute__ ((section ("ram_bootloader"))) And then when you compile your code, it should put all those functions in an hex file that you can include in your project.

[Altera_Forum]

Hi guys, 

 I'm very interested in this issue, too. Somehow i have a similar problem as sgievounet.  I have a NIOS II System created in SOPC. I added an onchip ram ond onchip rom to the system. I set the reset vector of the NIOS CPU to the onchip rom. In the onchip rom details I checked the "user created initialization file" which in my case is just named rom.hex. Also, my system has an uart module for std out.  Now, I create the SOPC system. After that, I open the NIOS IDE and create a new C/C++ project with the "hello world small" settings with the SOPC Builder system as target hardware. I set the .text and .rodata to my onchip rom module. .rwdata, heap and stack is set to the onchip ram. stdout is my uart.  I build the syslib and the hello_world_small application. Everything works fine and ends successfully.  Now, I don't know, how to go on to bring my project to work on my hardware. I have custom hardware, which consits of a Cyclone EP1C3 and a configuration device EPCS1. The are set up to work in AS mode. There is no JTAG functionality. If I want to flash the EPCS from the Quartus II programmer, I have to use the AS mode there, too because in JTAG mode it says something like "no JTAG chain found . . . ".  What are the next steps I need to perform to get my design working on my hardware. I don't want to use any bootloaders. I would like to get the machine code on my defined reset vector which resides in the onchip rom.  The NIOS IDE says at the end of the hello_worl_small build process that it created a rom.hex file. I don't know, if this file contains my program or not. Up to now, I was not able to get it to work.  Please give me some advises. Maik

[Altera_Forum]

Thank you Daixiwen for your help. 

I found how to solve my problem. It was my first time I had to use NIOS IDE. Solution was quite simple... Kiamur, I don't know if it is going to help you. For my case, I have 2 components in my SOPC design " on_chip memory" and "rambootloader". When I create my project on NIOS IDE, I specify the .ptf of the NIOS architecture made with SOPC. Then, when I build my project, it automaticcaly creates the rambootloader.hex and onchip_memory.hex for my components ( the name.hex depends of the module name of your components in SOPC). It is also important that your C code fits with the design from SOPC: base adresses and IRQ. Finaly, you can generate the NIOS with SOPC, then compile in Quartus.  Daixiwen do you have an idea if it is possible to re-compile the NIOS part in Quartus after each modification and not the full design to earn time?  Regards,

[Altera_Forum]

--- Quote Start ---  Daixiwen do you have an idea if it is possible to re-compile the NIOS part in Quartus after each modification and not the full design to earn time?  --- Quote End ---    maybe the 7th post in this thread answers your question?!?  http://www.alteraforum.com/forum/showthread.php?t=5633&highlight=elf2hex (http://www.alteraforum.com/forum/showthread.php?t=5633&highlight=elf2hex)

[Altera_Forum]

Yes, the last two commands in the post 7 should reassemble a new configuration with the updated hex file without recompiling all the project.

[Altera_Forum]

I still have a question about this: 

  --- Quote Start ---   void myfunc(parameters) __attribute__ ((section ("ram_bootloader"))   --- Quote End ---  In my code, I am still using an    --- Quote Start ---   int main (void) __attribute__ ((weak,alias ("alt_main")));  which calls then the int alt_main (void);   --- Quote End ---  How can I add the previous fonction so it generates the ram_bootloader.hex file?