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I'm using a Cyclone III DSP Kit (DK-DSP-3C120N) and uClinux. Some days ago I realized a working design which includes a Nios II processor characterized by only an instruction cache. Within the system there's an IP that communicates with the CPU using a PIO peripheral. I wrote a Linux driver for this IP. All seems to work, but if I add also a data cache, Nios II and the IP stop to communicate, it seems that data do not leave the PIO. Can anyone tell me why? Thanks in advance Marco
IIRC you normally use the return value from ioremap_nocache().
- it returns NULL on failure. Doing a memset() on device registers isn't necessarily a good idea either. You probably want much more control over the actual bus cycles used.
