Nios II Dev Kit (Cyclone)

[Altera_Forum]

Hi,  

 I've tried the Nios Dev Kit on the Stratix and managed to get the "Binary Counter" example program running as in the Hardware Tutorial. However when I tried to do the same thing for the Nios II ver 1.1 on the Cyclone EP1C20F400C7 board, there seems to be an error.  When I program the Nios project into the kit from Quartus, the "User" LED turns on, (and should stay on, as done on the Stratix), but on the Cyclone board, it reverts back to "Safe" mode. Thus, it is the original factory setting Nios in there and not my design, if I continue to Run the "Binary Counter" app from the Nios IDE program, the Nios processor will just 'hang'.   What could cause the board to auto reprogram itself into safe mode after I download my design file into it? I am using the USB Blaster cable running on WinXP with Quartus version 4.0.  Thanks in advance. Thean Charn

[Altera_Forum]

It's strange. The configuration controller can reconfigure FPGA with safe configuration data located at 0x700000 address in flash, only when you press "Safe" button. If you have configuration data in EPCS or 0x600000 address in flash, you can see exactly which data is reprogrammed. Anyway, reconfiguration shall not happen unless you press reconfiguration buttons. 

 BTW, you'd better upgrade your quartusII 4.0 to 4.2 which corresponding to NIOS II version 1.1.

[Altera_Forum]

<div class='quotetop'>QUOTE </div> 

--- Quote Start ---  When I program the Nios project into the kit from Quartus[/b]  --- Quote End ---   have u downloaded the correct FPGA configuration for Cyclone EP1C20F400C7 board? <div class='quotetop'>QUOTE </div>  --- Quote Start ---  if I continue to Run the "Binary Counter" app from the Nios IDE program[/b]  --- Quote End ---   have u created a new software project linked with the FPGA configuration for Cyclone EP1C20F400C7 board? I hope it helps. bye

[Altera_Forum]

upgraded to quartus 4.2 and seems that the reset address was set to ram... got it working already now.