Nios V: niosv-download reports "no harts found" on Agilex 5 board

[JMX]

I am seeking for ideas with the following issues I have on agilex 5.

I want to test a very basic example "hello world" on the board. However, I got a problem on downloading the elf file. My sof file includes a noisv processor and it's successfully download to the board. I can run the command jtagconfig and the following output shows the USB Blaster. The .elf file is generated successfully through the cmake command.
However, when I execute the command niosv-download.exe app.elf --go, the follwing error will be outputted.

My design in Platform Designer is attached.

[FawazJ_Altera]

Greetings,

This seems to be a reset issue. The Reset Release IP is missing from your platform. You may refer to the Nios V application note: https://www.intel.com/content/www/us/en/docs/programmable/784468/current/an-985-processor-tutorial.html
You can follow the steps in 1.2.1 section (1.2.1.1.2.4. Adding Reset Release Intel® FPGA IP).

Furthermore, you may refer to the design examples available for Agilex 5 development kit:

1- Agilex™ 5 - Hello World on Nios® V/g Processor Design Example

2- altera-fpga/agilex5e-nios-ed: Nios V Processor example designs targeting Altera Agilex 5 Development Kits

Thank you,

Fawaz.

[JMX]

Hi, I have tried to change my design but still shows this output when I run the command NIosV download. I will have a look at the links you attached, thank you so much for your quick reply!

[JMX]

And also I have tried the ready-to-test in this link https://github.com/altera-fpga/agilex5e-nios-ed. I download the .sof file to the board through Quartus Prime Pro 25.1 -> Tool -> Programmer -> Change File ->top.sof, then run the command NiosV download, the command shell still shows the error.

[FawazJ_Altera]

Hello,

Can you try to reduce the JTAG Speed using the command below:
jtagconfig --setparam 1 JtagClock 6M

After that, download the Nios V elf file:

niosv-download -g -r app.elf

I will test the Github design on board, and I will let you know my findings.

Thank you,

Fawaz.

[FawazJ_Altera]

Hello,

We have tested the Github ready-to-test files, and they are working on boards.

I would like to know if you are using a development kit or customer kit. Also, what is your device OPN.

Furthermore, can you program the .sof file, then use Nios V command shell and type the following command:

jtagconfig -n

Send me the output of this command.

Thank you,

Fawaz

[BoonBengT_Altera]

Hi @JMX,

Good day, just following up on the previous clarification.

By any chances did you managed to look into it?

Hope to hear from you soon.

Best Wishes

BB