Nios code size too big

Altera_Forum · ‎06-26-2009

Hi,

I am developing a new Nios project that I am trying to squeeze into a small code space. We want to run it in a Cyclone III part without any external RAM. It will load from an EPCS device into the RAM in the FPGA and execute from there. I think I can get my code into about 16K. The trouble is that even if I have project with nothing but a while(1) loop there is already about 16K. It would seem a bunch of Altera components are loaded. I probably need some of them like the JTAG UART controller but it seems like a lot to me.

Why is it loading all these components? Do they get loaded based on what is defined in the system.h file? How can I shrink this footprint?

Thanks.

Mike

Altera_Forum · ‎06-29-2009

Hi, to shrink the footprint you may try to:

in syslib properties:

- uncheck Support C++

- check Lightweight device driver

- check Reduced device drivers

- check Small C library

Obviously your program should respect these constraints.

in addition you could set compiler options both for your program and syslib (properties->C/C++ Build->Nios II Compiler-->General):

- Optimize Size (-Os)

- Debug level none

I suggest to modify these settings for the "Release" configuration and to set the "active build configuration" to Release.

So you can easily switch between the small version and the debug version of your software.

Altera_Forum · ‎06-29-2009

Thanks David, that is awesome advice, doing that got the code down to about 800 bytes. I need to go back and figure out just what those settings mean a little, i.e. can I still do what I need to but now I feel I am headed in the right direction.

Mike

Altera_Forum · ‎10-06-2009

I'll add my thanks as well.

I was already doing the right thing with syslib properties, but

- Optimize Size (-Os)

- Debug level none

for a release build made a huge saving.

Bruce