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Nios problem with interfacing custom component

Altera_Forum
Honored Contributor II
1,241 Views

Hi, 

 

I am a newbie to Altera/Nios and have followed some tutorial to build a Nios2 system.  

Now I am trying to build a custom component with interface to the Nios2, but I am having some trouble to get it work properly.  

 

The purpose of the component code is only to light up some leds (works standalone with hard coded values), but I am not able to get it work with data send from the Nios processor (all leds are turned on independent of the value send from the Nios2 processor).  

 

Hope someone can give me some tip on what I am doing wrong in my code. 

 

 

 

Here is my code: 

 

component: 

 

module light_avalon(clock, resetn, D, byteenable, Q); 

input clock, resetn; 

input [1:0] byteenable; 

input [15:0] D; 

output reg [7:0] Q; 

 

always @(posedge clock) 

begin 

Q[7:0] <= D[7:0]; 

end 

endmodule 

 

module light_avalon_interface(clock, resetn, writedata, readdata, 

write, read, byteenable, chipselect, 

Q_export); 

///Signals for connecting to Avalon fabric 

input clock, resetn, read, write, chipselect; 

input [1:0] byteenable; 

input [15:0] writedata; 

output [15:0] readdata; 

///Signals for exporting reg. contents outside system 

output [7:0] Q_export; 

wire [1:0] local_byteenable; 

wire [15:0] to_reg; 

wire [7:0] from_reg; 

 

assign to_reg = writedata; 

//assign to_reg = 8'hAA; //Test module code 

 

light_avalon(.clock(clock), .resetn(resetn), .D(to_reg), 

.byteenable(local_byteenable), .Q(from_reg)); 

 

//assign readdata[7:0] = from_reg[7:0]; 

assign Q_export = from_reg; 

 

endmodule 

 

nios2: 

 

From system.h: # define ALT_MODULE_CLASS_light_avalon_0 light_avalon 

# define LIGHT_AVALON_0_BASE 0x8c20 

# define LIGHT_AVALON_0_IRQ -1 

# define LIGHT_AVALON_0_IRQ_INTERRUPT_CONTROLLER_ID -1 

# define LIGHT_AVALON_0_NAME "/dev/light_avalon_0" 

# define LIGHT_AVALON_0_SPAN 2 

# define LIGHT_AVALON_0_TYPE "light_avalon"From Main: while( 1 )  

usleep(1000000); 

 

IOWR_16DIRECT(LIGHT_AVALON_0_BASE, 0, 0x00AA); 

 

}
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4 Replies
Altera_Forum
Honored Contributor II
527 Views

Try just using IOWR instead of IOWR_16DIRECT

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Altera_Forum
Honored Contributor II
527 Views

 

--- Quote Start ---  

Try just using IOWR instead of IOWR_16DIRECT 

--- Quote End ---  

 

 

Hi, 

 

Tnx for reply, I have tested the IOWR macro without any luck, for me it seems like the value 0xFF is passed to the component (all leds are turned on).
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Altera_Forum
Honored Contributor II
527 Views

Make your slave 32bits wide - even if you only look at a few bits and return 0 for reads. 

Learn to use signaltap, it will show you what is wrong.
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Altera_Forum
Honored Contributor II
527 Views

I would try to use the write signal instead of byteenable to qualify the writedata into the light_avalon module. 

 

module light_avalon(clock, resetn, D, write, Q); 

input clock, resetn; 

input write; 

input [15:0] D; 

output reg [7:0] Q; 

 

always @(posedge clock) 

begin 

if (write) Q[7:0] <= D[7:0]; 

end 

endmodule 

 

The reason is that the Avalon interface into the light_avalon_interface can be receiving writedata, which is not intended for the light_avalon. By using the write signal, you will guarantee that the writedata is valid for your module. 

 

Hope this helps.
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