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Nios2 Crashes when SDRAM is shared

Altera_Forum
Honored Contributor II
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Hi, 

 

I'm sharing my SDRAM between a Nios2 processor and a Avalon MM Master Writer that is performing write operation on the SDRAM. 

 

The Nios2 processor is working fine until I perform a write operation which causes the processor to stop working (no more instruction seems to be performed any more). 

 

How can I make it work ? 

 

Thanks, 

Nemesys
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Altera_Forum
Honored Contributor II
371 Views

At a guess your Avalon master is buggy - maybe not detecting the end of the write (or something) and locking the other masters out of the SDRAM. 

signaltap might be informative.
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Altera_Forum
Honored Contributor II
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The Avalon MM Master Writer is an implementation of the Avalon MM template from Altera.

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Altera_Forum
Honored Contributor II
371 Views

I figured I was writing in outside the SDRAM address map. Now it works properly.

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