Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
12748 Discussions

PIO : output port reset value

Altera_Forum
Honored Contributor II
‎01-06-2011 04:11 PM
1,636 Views

Hi, 

 

I am using QUARTUS II 9.1. 

I am using some PIO in both input and output mode. One of them is on 24 bits. I would want it to have the next reset value : 0x05003F. 

The problem is : ALL the PIO output register bits remain set to '1'. I see it in modelsim and in the VHD file generated by SOPC builder too. 

How can i force the reset value to the required one ? 

Thanks in advance for your answer.
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎01-12-2011 08:51 AM
914 Views

Nobody can help me please or had the same problem ? 

Regards
0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.