I am attempting to compile a new preloader on windows using SOCEDS 18.0...but am failing at untar'ing the uboot-socfpga.tar.gz.
Chris@DESKTOP-NSSUV7O /cygdrive/f/VirtualBox VMs/share/rocketboards_image/17_1_DE10/DE0_NANO_SOC_18_0/software/spl_bsp $ make tar zxf /cygdrive/c/intelFPGA/18.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gztar: Error opening archive: Failed to open '/cygdrive/c/intelFPGA/18.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz' make: *** [uboot-socfpga/.untar] Error 1 Ideas? Besides the point, I am trying to change the SOC Workshop Kernel Module# 9 to use the FPGA 2 SDRAM instead of the FPGS 2 HPS (Heavyweight), by recompiling the preloader, as I've read this is why the FPGS 2 SDRAM is failing for me. Right now I'm reinstalling SOCEDS into virtual machine, and trying again. Project compiled with 18.0. SOCEDS is version 18.0 Thanks!連結已複製
My fix was to remove the untar from the makefile (run the tar xvf $(preloader.tar.gz) myself)and/or make sure the filepath does NOT have any spaces in it. Seemed to work for me for now. New preloader.bin generated!
--- Quote Start --- My fix was to remove the untar from the makefile (run the tar xvf $(preloader.tar.gz) myself)and/or make sure the filepath does NOT have any spaces in it. Seemed to work for me for now. New preloader.bin generated! --- Quote End --- I am experiencing the same with version 16.1. I have an older preloader, which I already have compiled (propablywith an older version). Just tried to recompile this one with version 16.1. It reported the same error. I can not see which version was used to generate this preloader/BSP. It make no difference whether I try to compile the old or the new preloader. Neighter will untar the source code. I can confirm, that if I copy the "tar" line from the error message and execute it directly in EDS command shell, it works fine.
Commet out lines 219/220 of preloader make file.
# $(RM) $(PRELOADER_SRC_DIR) # $(untar_recipe) Run tar zxf /cygdrive/c/intelFPGA/18.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz then make from EDS prompt. I am not good enough with make to know what is going on, but this seems to be the band-aide for me right now.In my case, the file "tar.exe" was in the folder "c:\window\system32". I ran "make -j -d" and at the end saw, that "make" would try to start "c:\windows\system32\tar.exe zxf ..." instead of cygwin path. Of course, windows tar can't to recognise unix path and finishes with error "File not found". So, I deleted "tar.exe" in "c:\window\system32" folder and this is a solution for this issue.
Hi,
I stumbled upon the exact same issue, Quartus 18.0 & Windows 10 here.
MKami1 answer nailed it, however personnally I did not want to delete c:\windows\system32\tar.exe from my system, so instead I opted for a one line modification of the Makefile, to avoid swapping windows-style paths by unix-style paths for this specific command:
#$(UNTAR) $(shell cygpath --unix "$(if $1,$1,$(if $<,$<,$(error ERROR: no input provided to gnu make function untar_recipe)))")
$(UNTAR) $(if $1,$1,$(if $<,$<,$(error ERROR: no input provided to gnu make function untar_recipe)))
Works fine. There is probably a much better permanent fix, but I will let Altera care about it.
Cheers
Julien
After getting some inspiration to your suggestions above, I found a pretty good solution.
Simply run /usr/bin/make instead of just make.
On my system it uses make from /cygdrive/c/intelFPGA/18.1/embedded/host_tools/gnu/make/H-x86_64-mingw32/bin/make instead of /usr/bin/make
