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12748 Discussions

Problem With Reset,Exception Address Offset

Altera_Forum
Honored Contributor II
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I am lerning how to make new custom logic component and tryed LED_PIO example which is in example designs for Development bords.  

 

So I made new Quartus project and made New component with Test_pio.VHD ;Tled_pio_REGS.h files  

Problem is that When I put this component in system with nios II core then in Nios II cpu_0 settings where are Reset and Exception Addresd Offsets there are automaticaly created offset values:  

reset address 0x00000000  

Exception address 0x00000020 

 

I got 2 errors:  

1. cpu_o instruction cace must be smaller then the instruction-master address space. 

2. Offset out of range for exception address on Test_pio_0. maximum ofset is 0x00000002  

 

When I change Exception address to 0x00000002 then I have new error like: Exception address must be multiple of 0x20  

and second Error: Exception addres must be at least 0x20 bytes higher than the resset addres.  

I tried all ather combination but still lot off errors What is a problem??  

here are Tled_pio_REGS.h code  

#ifndef __TLED_PIO_REGS_H__# define __TLED_PIO_REGS_H__ # include <io.h> # define IOADDR_TLED_PIO_PIO_WRITEDATA(base)           __IO_CALC_ADDRESS_NATIVE(base, 0)# define IORD_TLED_PIO_WRITEDATA(base)             IORD(base, 0) # define IOWR_TLED_PIO_WRITEDATA(base, data)       IOWR(base, 0, data) # define IOADDR_TLED_PIO_RESET_N(base)           __IO_CALC_ADDRESS_NATIVE(base, 1)# define IORD_TLED_PIO_RESET_N(base)             IORD(base, 1) # define IOWR_TLED_PIO_RESET_N(base, data)       IOWR(base, 1, data) # endif /* __TLED_PIO_REGS_H__ */ 

 

and  

library altera; use altera.altera_europa_support_lib.all; LIBRARY ieee; USE ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; --  Entity Declaration ENTITY Test_pio IS     -- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!     PORT     (  chipselect : IN STD_LOGIC;  clk : IN STD_LOGIC;  reset_n : IN STD_LOGIC;  write_n : IN STD_LOGIC;  writedata : IN STD_LOGIC_VECTOR(7 downto 0);  address : IN STD_LOGIC_VECTOR(4 downto 0);  out_port : OUT STD_LOGIC_VECTOR(7 downto 0)     );     -- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!      END Test_pio; --  Architecture Body ARCHITECTURE Test_pio_architecture OF Test_pio IS    signal clk_en :  STD_LOGIC;                signal data_out :  STD_LOGIC_VECTOR (7 DOWNTO 0);      BEGIN     clk_en <= std_logic&#39;(&#39;1&#39;);   --s1, which is an e_avalon_slave   process (clk, reset_n)   begin     if reset_n = &#39;0&#39; then       data_out <= std_logic_vector&#39;("00000000");     elsif clk&#39;event and clk = &#39;1&#39; then       if std_logic&#39;(((chipselect AND NOT write_n) AND to_std_logic((((std_logic_vector&#39;("000000000000000000000000000000") & (address)) = std_logic_vector&#39;("00000000000000000000000000000000")))))) = &#39;1&#39; then         data_out <= writedata(7 DOWNTO 0);       end if;     end if;   end process;  out_port <= data_out; END Test_pio_architecture; 

 

so where is a problem ??
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Altera_Forum
Honored Contributor II
755 Views

if you get <div class='quotetop'>QUOTE </div> 

--- Quote Start ---  

cpu_o instruction cace must be smaller then the instruction-master address space[/b] 

--- Quote End ---  

than your project is probly missing some memory component for instructions, or you have it but is not connected to the instruction bus. You may add a small internal memory segment (16kB) and change the CPU for the small one so it will not consume M4K blocks for cache. 

 

IzI
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Altera_Forum
Honored Contributor II
755 Views

 

--- Quote Start ---  

originally posted by epis@Dec 13 2006, 06:01 PM 

2. offset out of range for exception address on test_pio_0. maximum ofset is 0x00000002 

--- Quote End ---  

 

 

how about this maximum ofset is 0x00000002 does that depends on regs.h file?? becose I tried diferent regs.h files and got diferent max ofset address values like 0x00000004 and 0x00000007  

 

I just made some reading and maby I don&#39;t need this:# define IOADDR_TLED_PIO_PIO_WRITEDATA(base) definition  

 

 

 

and do I need to define reset_n ??  

 

maby this will work  

#ifndef __TLED_PIO_REGS_H__# define __TLED_PIO_REGS_H__ # include <io.h> # define IORD_TLED_PIO_WRITEDATA(base)             IORD(base, 0) # define IOWR_TLED_PIO_WRITEDATA(base, data)       IOWR(base, 0, data) # endif /* __TLED_PIO_REGS_H__ */ 

 

this is how original Altera_avalon_PIO_regs.h looks 

 

#ifndef __ALTERA_AVALON_PIO_REGS_H__# define __ALTERA_AVALON_PIO_REGS_H__ # include <io.h> # define IOADDR_ALTERA_AVALON_PIO_DATA(base)           __IO_CALC_ADDRESS_NATIVE(base, 0)# define IORD_ALTERA_AVALON_PIO_DATA(base)             IORD(base, 0) # define IOWR_ALTERA_AVALON_PIO_DATA(base, data)       IOWR(base, 0, data) # define IOADDR_ALTERA_AVALON_PIO_DIRECTION(base)      __IO_CALC_ADDRESS_NATIVE(base, 1)# define IORD_ALTERA_AVALON_PIO_DIRECTION(base)        IORD(base, 1) # define IOWR_ALTERA_AVALON_PIO_DIRECTION(base, data)  IOWR(base, 1, data) # define IOADDR_ALTERA_AVALON_PIO_IRQ_MASK(base)       __IO_CALC_ADDRESS_NATIVE(base, 2)# define IORD_ALTERA_AVALON_PIO_IRQ_MASK(base)         IORD(base, 2) # define IOWR_ALTERA_AVALON_PIO_IRQ_MASK(base, data)   IOWR(base, 2, data) # define IOADDR_ALTERA_AVALON_PIO_EDGE_CAP(base)       __IO_CALC_ADDRESS_NATIVE(base, 3)# define IORD_ALTERA_AVALON_PIO_EDGE_CAP(base)         IORD(base, 3) # define IOWR_ALTERA_AVALON_PIO_EDGE_CAP(base, data)   IOWR(base, 3, data) # endif /* __ALTERA_AVALON_PIO_REGS_H__ */
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Altera_Forum
Honored Contributor II
755 Views

<div class='quotetop'>QUOTE </div> 

--- Quote Start ---  

2. Offset out of range for exception address on Test_pio_0. maximum ofset is 0x00000002[/b] 

--- Quote End ---  

 

If the only component on the bus (PIO) has only two memory locations, you can not place your exception address to the 32th location as you tried to do. 

 

The shortened .h file is probably OK, if you wish only to write into the component and not read from it. 

 

IzI
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Altera_Forum
Honored Contributor II
755 Views

I finaly make it I add aditional on chip Ram 4K and these ofset adress don&#39;t errored so i generated my firs nios II system http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif  

 

 

many thanks!
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