Problem compiling in NIOS II 1.1

[Altera_Forum]

Hi, 

 Just starting on NIOS II and altear FPGA, and am using Future Electronics' CYCLONE badge baord with EP1C12Q240C6, Hardware evaluation and SOPC builder compiled and programmed sucessfully however when I got to the NIOS II 1.1 IDE I'm getting the following error when I compile the reference design, before this I was getting a different set of errors on the Quartus 4.2 and NIOS 1.0 and was told by MySupport (after waiting for ages) to upgrade to 1.1. Now I have this new set of errors!   make -s rebuild  Creating C:DOCUME~1vicSOPC_B~1/install.ptf... Creating generated_all.mk... Creating alt_sys_init.c... Compiling main.c... Compiling uart.c... ../uart.c:64:3: warning: no newline at end of file Linking simple_cyclone_board.elf... /cygdrive/c/altera/kits/nios2/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.1/../../../../nios2-elf/bin/ld: address 0x76a8 of simple_cyclone_board.elf section .rom is not within region rom collect2: ld returned 1 exit status make[1]: *** [simple_cyclone_board.elf] Error 1 make: *** [rebuild] Error 2 Build completed  Thanks for any help.  Vic

[Altera_Forum]

It _looks_ like you're trying to fit your code is outgrowing the memory space you've allocated for it. How large is ".rom"? Where is is located? 

 If I were you, I would start by building programs targeting reasonably large memories...just to a feel for the size of the code that is generated. By default, the IDE includes a lot of nice coding conveniences, but, as with all conveniences, this comes a price.  Here are the rules that you need to follow:  1. Locate your reset address in non-volatile memory (flash and/or onchip memory).  - This is done inside SOPC Builder.  - Not strictly necessary, but recommended. 2. Target the bulk of your code in a _large_ offchip memory (SRAM, SSRAM, SDRAM)  - You can control where the linker locates your code by changing the target memories for .text, .rodata, and .rwdata on the System Library properties page.  If you have questions about any of this, I suggest that you start doing some reading :-) Putting some diligence and effort into your study will go a long ways towards preventing headache at the end of your design cycle and may even prevent you from making some stupid architecture decisions!  Cheers,  - slacker

[Altera_Forum]

Thanks slacker, well taken. 

 I would very much like to start with the Altera tutorial however, my dev board although promoted by Altera is not supported by the examples. So I'm at the mercy of whatever is in the examples included in the package which as you see can't even compile correctly "out of the box". To make it worst, the dev board maker says all questions must be directed to Altera which I have been trying for over 2 months now to get me answers. So strictly speaking I am going though a tutorial and the tutorial can't even run properly! I think I am getting more meaningful and timely help in this forum.  Thanks, Vic

[Altera_Forum]

I'm a little suprised that their "Quick Start Guide" didn't help.... C'est La Vie! 

 Basically, if you haven't added any memory/etc., via the "Santa Cruz connector", all you've got are onchip resources. If I were you, I'd read up on how much onchip memory your device has, and then create a memory which consumes most (if not all) of it. Keep in mind that, depending on the version of the processor you use, it will consume memory resources, as well. The Nios II/e core will consume the least, but is a lot slower than the other two cores. I would recommend creating yourself a small SOPC Builder system with a Nios II/e, your onchip memory, and a jtag_uart.  Within the Nios II IDE, be sure to set/unset the following on the System Library properties page:  - Check Reduced Device Drivers, Small C Library  - Reduce the number of file descriptors to 4. (minimum allowed)  Try to run Hello World, first. If successful, "congrats". If not, post your results here and I, or someone else, will see if we can help.  Best of luck!  - slacker

[Altera_Forum]

Slacker, 

 Sorry I thought the tutorial was idiot proof and kept to it&#39;s intructions not knowing any better. After toying with the memory model, it compiled ok and works as expected. Now, I can do my reading in peace. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/wink.gif   Thanks again, Vic