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Program EPCS with 2 Nios II Images

Altera_Forum
Honored Contributor II
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Hello, 

 

I have 2 Nios II with 2 individual RAM. These 2 RAMs stored the same program code. Can I program only one code into EPCS using Nios II FLASH PROGRAMMER and boot the 2 Nios II from their respective RAM to execute the same program? 

 

Thanks, 

Caridee
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Altera_Forum
Honored Contributor II
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You will need a custom bootloader, at least for the second Nios CPU. Without it, both CPUs will try to load the code from the EPCS at the same time, and it will fail.

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Altera_Forum
Honored Contributor II
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Thank you Daixiwen. 

 

Does it mean that one cpu will has its own/custom bootloader and another cpu will has the default boot loader? If yes, then wat shud be the reset vector of these two CPUs? 

 

Please could you explain more to me? 

 

Thanks, 

caridee jo.
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Altera_Forum
Honored Contributor II
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Have a look at this application note (http://www.altera.com/literature/an/an458.pdf?gsa_pos=3&wt.oss_r=1&wt.oss=nios%20boot) about bootloaders for Nios.

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Altera_Forum
Honored Contributor II
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I have answered this question before and even provided source code for a custom epcs bootloader somewhere in the forum: 

 

Read this thread: 

http://www.alteraforum.com/forum/showthread.php?t=20623&referrerid=2226 

 

Jake
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Altera_Forum
Honored Contributor II
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Hi Jake or Daxiwen, 

 

thanks for the response. 

 

What if i have 2 .sof files to be programmed into a CFI flash memory? Can I program these 2 .sof files into the flash memory and configure the FPGA with these 2 sof files separately through switch button? 

 

Thanks for your answer.
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Altera_Forum
Honored Contributor II
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What device is pulling the SOF data from the CFI flash to program the FPGA? 

 

Jake
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Altera_Forum
Honored Contributor II
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Hi Jake, 

 

The device is Cyclone III.
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Altera_Forum
Honored Contributor II
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Hi Jake, 

 

I think i have mistaken in replying your question. actually i have 2 hardware images now. i want to program these 2 images to cfi flash memory using Nios II flash porogrammer. and upon successful programming, i want the hardware image configures the FPGA through a switch. For example, if i want the FPGA to be configured by 1st hardware image then i press switch A and so on.... 

 

Please advice...
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Altera_Forum
Honored Contributor II
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Switching between images can be done using remote configuration, because it lets choose load address from EPCS or CFI. Here http://www.grigaitis.eu/?p=514 is nice description of remote configuration. There is: 

int CycloneIII_Reconfig( int remote_update_base, int flash_base, int reconfig_offset, 

int watchdog_timeout, int width_of_flash ); 

 

function that switch between images, you just need to use default image that will be loaded first. Moreover both images must have remote configuration and both of them should have button reading function that show when you need to switch image. 

 

Here need only imagination..
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Altera_Forum
Honored Contributor II
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So it sounds like you are using Active Parallel programming with a CFI flash and the cyclone III. If this is the case, then eddis is correct, the remote_update core is what you'll need to dynamically load the desired FPGA image. 

 

Jake
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Altera_Forum
Honored Contributor II
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Hi Jake and Eddis, 

 

Thanks for replies.  

 

Other than remote_update component in my sopc, do I need a Nios II processor to control the remote configuration? I ask so because my hardware image does not contain processor... 

 

Thanks
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Altera_Forum
Honored Contributor II
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Actually you do not need NIOS, but it is easer to use it.. You can put remote update as block in schematic diagram using MegaWizard PlugIn Manager. .. and initiate reconfigure , write address and etc. by hardware.. for me personally simpler and faster is to use NIOS processor. 

 

Any way you need read PDF about remote_update first and than ask questions.. because most of your question can be answerred by reading components describtions..
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