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Hello everyone:
I am trying a SPI core(3 Wire serial, provided by altera) to control SPI DAC, and I configured it as a master mode. The Sclk is setted to 25Mhz. But when I observed the signal on sclk port, it was always high! there is no clock on it.. In my opinion, the clock signal should appear on this port automatically after download. Should I write some control sentence in the software? This is the first time I use the SPI core, so I am puzzled, Who can tell me what the possible problem is? Thank you very much!Link Copied
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you'd better read "Altera Embedded Peripherals Handbook.pdf".
One possible reason is SPI Core provided by altera can't support clock up to 25MHz.- Mark as New
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--- Quote Start --- originally posted by david_cai@Oct 25 2006, 10:06 AM you'd better read "altera embedded peripherals handbook.pdf".
one possible reason is spi core provided by altera can't support clock up to 25mhz.
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--- Quote End --- Thanks David_Cai. Yes, I have read that handbook, when I set 25Mhz in the winzard, the actual frequecy is 21.5MHz(85/4). But the slck port always high is not reasonable.
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spi clock will output only when you write data to spi.
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--- Quote Start --- originally posted by hippo@Oct 25 2006, 10:47 AM spi clock will output only when you write data to spi.
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--- Quote End --- Thanks hippo. I have see the clock!:)
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--- Quote Start --- originally posted by 0quanquan0+oct 24 2006, 10:36 pm--><div class='quotetop'>quote (0quanquan0 @ oct 24 2006, 10:36 pm)</div>
--- quote start ---
<!--quotebegin-hippo@Oct 25 2006, 10:47 AM spi clock will output only when you write data to spi.
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--- Quote End --- Thanks hippo. I have see the clock!:) <div align='right'><{post_snapback}> (index.php?act=findpost&pid=18890)</div> [/b] --- Quote End --- /* * "Hello World" example. * * This example prints 'Hello from Nios II' to the STDOUT stream. It runs on * the Nios II 'standard', 'full_featured', 'fast', and 'low_cost' example * designs. It runs with or without the MicroC/OS-II RTOS and requires a STDOUT * device in your system's hardware. * The memory footprint of this hosted application is ~69 kbytes by default * using the standard reference design. * * For a reduced footprint version of this template, and an explanation of how * to reduce the memory footprint for a given application, see the * "small_hello_world" template. * * * write(0, 18); //configure serial interface for MSB first write(5, 3); //set Devices-Index to program ADC Channels 0 and 1 write(18, 80); //set vref to option 2 and adjustment to all zeros write(14, 10); //set output_mode to level option 0, disable output MUX, enable output and offset binary write(17, 83); //set output_delay to enable and set to delay value of 3 write(FF, 1); //write transfer bit (for configurations that require a manual transfer) write(10, 3); //set offset to 3 (for Channel 1 only) write(5, 2); //set Device-Index to program ADC Channel 1 write(FF, 1); //write transfer bit (for configurations that require a manual transfer) Write(5, 4); //set Devices Index to program ADC Channel 2 write(10, 9); //set offset to 9 (for Channel 2 only) write(FF, 1); //write transfer bit (for configurations that require a manual transfer) */ # include <stdio.h># include <altera_avalon_spi.h> extern int alt_avalon_spi_command(alt_u32 base, alt_u32 slave, alt_u32 write_length, const alt_u8* wdata, alt_u32 read_length, alt_u8* read_data, alt_u32 flags);# include "system.h"# include "io.h" unsigned char *pAD9219= SPI_MASTER_BASE; void WRITE_AD9129(unsigned char RegOff,unsigned char DATA) { unsigned char *rdData; //*(SPI_MASTER_BASE+RegOff) = DATA; alt_avalon_spi_command(SPI_MASTER_BASE,0, 1,&DATA, 1,rdData, 0);//ALT_AVALON_SPI_COMMAND_MERGE);//Flag = ALT_AVALON_SPI_COMMAND_MERGE, if you wish to use that function, else put 0 } int main() { while(1) { printf("Hello from Nios II!\n"); //usleep(1000000); IOWR(LED_BASE,0,0xFF); usleep(1000000); IOWR(LED_BASE,0,0x00); /**(pAD9219+0x19) = 0x00; *(pAD9219+0x1A) = 0x00; *(pAD9219+0x1B) = 0x00; *(pAD9219+0x1C) = 0x00;*/ //*(pAD9219+1) = 0x00; //usleep(1000000); WRITE_AD9129(0x0, 0x18); //configure serial interface for MSB first WRITE_AD9129(0x5, 0x3); //set Devices-Index to program ADC Channels 0 and 1 WRITE_AD9129(0x18, 0x80); //set vref to option 2 and adjustment to all zeros WRITE_AD9129(0x14, 0x10); //set output_mode to level option 0, disable output MUX, enable output and offset binary WRITE_AD9129(0x17, 0x83); //set output_delay to enable and set to delay value of 3 WRITE_AD9129(0xFF, 0x1); //write transfer bit (for configurations that require a manual transfer) WRITE_AD9129(0x10, 0x3); //set offset to 3 (for Channel 1 only) WRITE_AD9129(0x5, 0x2); //set Device-Index to program ADC Channel 1 WRITE_AD9129(0xFF, 0x1); //write transfer bit (for configurations that require a manual transfer) WRITE_AD9129(0x5, 0x4); //set Devices Index to program ADC Channel 2 WRITE_AD9129(0x10, 0x9); //set offset to 9 (for Channel 2 only) WRITE_AD9129(0xFF, 0x1); //write transfer bit (for configurations that require a manual transfer) } return 0; }
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