Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

Reenabling interrupts

Altera_Forum
Honored Contributor II
987 Views

Hi, 

 

I made an assember routine sitting at the exception address that does the interrupt handling as follow (more or less) : 

[list][*]Save some registers 

 

[*]Save ienable 

 

[*]detect highest priority interrupt 

 

[*]modify ienable to allow higher priority interrupts 

 

[*]reenable interrupts 

 

[*]call the interrupt function 

 

[*]disable interrupts 

 

[*]restore ienable 

 

[*]restore other register 

 

[*]eret 

[/list] 

When I use this, the following strange things happen : 

 

- with the standard NIOSII core no problem at all 

 

- with the fast core and dcache always bypassed no problem at all 

 

- with the fast core and dcache, problems when calling a function like printf (variable argument lists) --> it does not return to the correct program counter I believe 

 

- with the fast core and dcache, no problem detected yet with e.g. a simple puts (no variable argument list). 

 

- with the fast core and dcache, but all stw and ldw instructions in the interrupt routine changed to stwio and ldwio (also a cache bypass), the problem with the printf stay's. 

 

 

Are there special things to take care of with variable argument lists and stack pointers, ... 

 

 

This problem drives me crazy at the moment, because I don't have much confident in my code at the moment because I don't know what happens here! The interrupt handling is very critical in my application. 

 

 

Anyone seems the same strange things with interrutps? 

 

Stefaan.
0 Kudos
0 Replies
Reply