Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
12748 Discussions

Simulating nios ii via modelsim - Launching stops at 57%

ABinO1
Novice
1,029 Views

hello all,

 

I have created a simple project from nios ii SBT for eclipse, I runn it on the board it worked fine. But When I try to run it as simulation on modelsim it just stops launching at 57% .....

Any one has an idea what the cause might be?

 

0 Kudos
3 Replies
EricMunYew_C_Intel
Moderator
1,018 Views

Hi, Ameen


Do you have any logs ?


Thanks.


Eric


0 Kudos
EricMunYew_C_Intel
Moderator
1,010 Views

Hi, Ameen


Can you follow below to your run Nios II RTL simulation to verify your design.


Platform Designer will allow you to generate a testbench and a tcl file for simulation using ModelSim. Nios SBT will allow you to generate .mif files (your C code) for memory initialization.


You may refer to page 433 to 439 of below:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed_handbook.pdf


https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/intellectual-property/embedded/nios-ii/exm-simulating-niosii.html


Thanks.


Eric



0 Kudos
EricMunYew_C_Intel
Moderator
1,009 Views

Hi, Ameen


Please kindly follow the document in my previous thread for Nios II RTL simulation (including your application code).


Can we close the case if you have no more question ?


Thanks.


Eric


0 Kudos
Reply