Stratix edition - project

[Altera_Forum]

Hello, 

 I don&#39;t if you know a interesting project to do by a student. He can use the Stratix Dev. Board, uClinux, design a new hardware design, write uClinux driver, write new module in VHDL, interface new peripheral... Many things to do in order to have an interesting project. I don&#39;t have any idea what project we can do with that product http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif   Best regards  Christian

[Altera_Forum]

High school or College/University? 

 With a dev. board there is a lot you can do especially with all the memory available on that board (I&#39;m stuck to onchip memory only with my board at home). I have lots of ideas floating around in my head just need the time to do them, but I wouldn&#39;t recommend those if they are a beginner (I was going to create a DSP system to do fast signal processing and compression on video and audio signals).  When I was in high school I made a circuit that interfaced with a PC and I made a real........... kindergardenish looking GUI to control it. My hardware interfaced with analog parts to control a train set so I could automate switching tracks, bypassing parts of the track that were blocked by an object, direction of the train, lighting in the houses, etc..... And I did this with descrete TTL parts (yep that&#39;s right TTL, so this thing needed a power bar to run) so with an FPGA this should be nicer (not easier but nicer).  If you don&#39;t mind your board getting beat up, maybe a battle bot would be a cool project (that is something those of us at my University always wanted to do, but didn&#39;t have time to do.... that and we were lazy lol).  Sounds like fun, hope the student likes it

[Altera_Forum]

How about a simple HW acceleration demonstration.  

 Create some real-world-ish problem you can solve as a C++ class or thread on linux. Then, create the equivalent hardware and write a device driver that feeds the HW your inputs. For example, if you&#39;re calculating CRC you&#39;d want your hardware to have its own master port that reads memory. Control registers would include a pointer of where to start calculating CRC, a byte-count register, control register, and then a result register. Your linux device driver would write the starting addr, byte count, and a &#39;go&#39; command, poll or wait for the status to indicate completion, and then read out the result.  ...When its all done, depending on the design trade-offs you made during your HW architecture, you&#39;ll have a system that likely runs orders of magnitude faster than the SW on the processor.... such is the power of FPGAs.   Although similar things to this have been done before you may get interest in this sort of thing at trade shows or academic conferences where the results can be published.