TSE_MAC_INIT error

[freesky]

Hi ,

i'm using quartus prime -18.1 version software.while executing NIOS sample socket server application on  Cyclone 10 on my own board .i use msgdma IP  for TX & RX between TSE MAC & SDRAM.   when run as nios hadware,it's giving error like: "TSE_MAC_INIT error".

the nios system with sgDMA can work sucess on cyclone IV  .we changed the FPGA to cyclone 10 LP  with the same sdram and phy schmatic.   I use Simple Socket Server template to build the software in eclipse  and run ,then nios console is like the picture.  i connect my PC to the board's RJ45 and fine configure the IP adress. the ethernet status shows  connected,  but i ping 192.168.1.234 failed.

[EricMunYew_C_Intel]

Hi, Xu

May I know which document are you referring to ?

Eric

[EricMunYew_C_Intel]

Hi, Xu

May I know which Cyclone IV board you are using ?

Eric

[EricMunYew_C_Intel]

Hi, Xu

MAC address is difference between the PHY chip of Cyclone V/IV board and Cyclone 10LP board. You may be need to get the correct MAC address from the Cyclone 10LP board.

You may refer to below document on how to get the MAC address:

https://www.intel.com/content/dam/altera-www/global/en_US/uploads/9/97/CVE_Nios_II_Simple_Socket_Server_Quick_Reference_Guide.pdf

And you may need to check the interface between the Cyclone 10LP and the ethernet PHY chip, and the I/O parameters might be different from Cyclone IV/V.

For example, the ethernet interface in Cyclone 10LP is 3.3V, but 2.5V in Cyclone IV/V.

Cyclone VE development board:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/rm_cve_fpga_dev_board.pdf

Cyclone 10LP development board:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-c10-lp-eval-kit.pdf

Eric

[EricMunYew_C_Intel]

Hi, Xu

Can I close this if you have no more inquiry ?

Eric