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UART Baud Rate

Altera_Forum
Honored Contributor II
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Does anybody know how to run a SOPC UART at slow baud rates, such as 100 Baud? I have some serial information coming in from an FSK demodulator ported to the data in on a standard UART. The problem is, the baud rate divisor is 16-bits!! So, for 100MHz Fsys - that makes the lowest Baud Rate 1525.9 

 

any suggestions?
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Altera_Forum
Honored Contributor II
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Can you take the FSK demodulated data in as some other data stream like SPI or I2C? I hope that your FSK demodulated interface is well tested because I don't thing you'll find any UART on a computer running that slow (300 is the minimum I think) 

 

With Quartus 4.2 SP1 and up there is clock crossing in SOPC Builder so you could put the UART on a really slow clock domain then the UART will divide it down (you'll stay in the 16bit realm of the divider). If this doesn't work (remember I haven't tested this since I have no clue how to test this) then I would look at the various other interfaces out there.
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Altera_Forum
Honored Contributor II
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yes, it must sound quite odd to ask for a UART running that slow. I actually think I'll be going with a custom UART. The demodulated data coming from the filters and moving reference detectors actually contains either steady FSK code rates, ASK code rates, or FSK data. It is the FSK data that is modulated at the other-end using older processors (i.e. 6809, etc..) that is able to mix the data at the slow rates (this is a mass-transit train application) 

 

thanks!
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